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@@ -173,7 +173,8 @@ static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val,
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static void tcg_out_call(TCGContext *s, const tcg_insn_unit *target,
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const TCGHelperInfo *info);
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static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot);
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-static bool tcg_target_const_match(int64_t val, TCGType type, int ct, int vece);
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+static bool tcg_target_const_match(int64_t val, int ct,
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+ TCGType type, TCGCond cond, int vece);
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#ifdef TCG_TARGET_NEED_LDST_LABELS
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static int tcg_out_ldst_finalize(TCGContext *s);
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#endif
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@@ -4786,6 +4787,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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TCGTemp *ts;
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TCGArg new_args[TCG_MAX_OP_ARGS];
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int const_args[TCG_MAX_OP_ARGS];
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+ TCGCond op_cond;
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nb_oargs = def->nb_oargs;
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nb_iargs = def->nb_iargs;
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@@ -4798,6 +4800,33 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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i_allocated_regs = s->reserved_regs;
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o_allocated_regs = s->reserved_regs;
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+ switch (op->opc) {
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+ case INDEX_op_brcond_i32:
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+ case INDEX_op_brcond_i64:
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+ op_cond = op->args[2];
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+ break;
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+ case INDEX_op_setcond_i32:
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+ case INDEX_op_setcond_i64:
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+ case INDEX_op_negsetcond_i32:
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+ case INDEX_op_negsetcond_i64:
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+ case INDEX_op_cmp_vec:
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+ op_cond = op->args[3];
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+ break;
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+ case INDEX_op_brcond2_i32:
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+ op_cond = op->args[4];
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+ break;
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+ case INDEX_op_movcond_i32:
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+ case INDEX_op_movcond_i64:
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+ case INDEX_op_setcond2_i32:
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+ case INDEX_op_cmpsel_vec:
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+ op_cond = op->args[5];
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+ break;
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+ default:
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+ /* No condition within opcode. */
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+ op_cond = TCG_COND_ALWAYS;
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+ break;
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+ }
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+
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/* satisfy input constraints */
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for (k = 0; k < nb_iargs; k++) {
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TCGRegSet i_preferred_regs, i_required_regs;
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@@ -4811,7 +4840,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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ts = arg_temp(arg);
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if (ts->val_type == TEMP_VAL_CONST
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- && tcg_target_const_match(ts->val, ts->type, arg_ct->ct, TCGOP_VECE(op))) {
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+ && tcg_target_const_match(ts->val, arg_ct->ct, ts->type,
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+ op_cond, TCGOP_VECE(op))) {
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/* constant is OK for instruction */
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const_args[i] = 1;
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new_args[i] = ts->val;
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