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@@ -752,28 +752,23 @@ static void designware_pcie_host_init(Object *obj)
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qdev_prop_set_bit(DEVICE(root), "multifunction", false);
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}
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-static const TypeInfo designware_pcie_root_info = {
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- .name = TYPE_DESIGNWARE_PCIE_ROOT,
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- .parent = TYPE_PCI_BRIDGE,
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- .instance_size = sizeof(DesignwarePCIERoot),
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- .class_init = designware_pcie_root_class_init,
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- .interfaces = (InterfaceInfo[]) {
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- { INTERFACE_PCIE_DEVICE },
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- { }
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+static const TypeInfo designware_pcie_types[] = {
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+ {
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+ .name = TYPE_DESIGNWARE_PCIE_HOST,
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+ .parent = TYPE_PCI_HOST_BRIDGE,
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+ .instance_size = sizeof(DesignwarePCIEHost),
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+ .instance_init = designware_pcie_host_init,
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+ .class_init = designware_pcie_host_class_init,
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+ }, {
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+ .name = TYPE_DESIGNWARE_PCIE_ROOT,
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+ .parent = TYPE_PCI_BRIDGE,
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+ .instance_size = sizeof(DesignwarePCIERoot),
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+ .class_init = designware_pcie_root_class_init,
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+ .interfaces = (InterfaceInfo[]) {
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+ { INTERFACE_PCIE_DEVICE },
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+ { }
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+ },
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},
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};
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-static const TypeInfo designware_pcie_host_info = {
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- .name = TYPE_DESIGNWARE_PCIE_HOST,
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- .parent = TYPE_PCI_HOST_BRIDGE,
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- .instance_size = sizeof(DesignwarePCIEHost),
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- .instance_init = designware_pcie_host_init,
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- .class_init = designware_pcie_host_class_init,
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-};
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-
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-static void designware_pcie_register(void)
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-{
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- type_register_static(&designware_pcie_root_info);
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- type_register_static(&designware_pcie_host_info);
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-}
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-type_init(designware_pcie_register)
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+DEFINE_TYPES(designware_pcie_types)
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