|
@@ -260,7 +260,7 @@ static uint64_t pflash_data_read(PFlashCFI02 *pfl, hwaddr offset,
|
|
{
|
|
{
|
|
uint8_t *p = (uint8_t *)pfl->storage + offset;
|
|
uint8_t *p = (uint8_t *)pfl->storage + offset;
|
|
uint64_t ret = pfl->be ? ldn_be_p(p, width) : ldn_le_p(p, width);
|
|
uint64_t ret = pfl->be ? ldn_be_p(p, width) : ldn_le_p(p, width);
|
|
- trace_pflash_data_read(offset, width << 1, ret);
|
|
|
|
|
|
+ trace_pflash_data_read(offset, width, ret);
|
|
return ret;
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
|
|
@@ -385,7 +385,7 @@ static uint64_t pflash_read(void *opaque, hwaddr offset, unsigned int width)
|
|
}
|
|
}
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
- trace_pflash_io_read(offset, width, width << 1, ret, pfl->cmd, pfl->wcycle);
|
|
|
|
|
|
+ trace_pflash_io_read(offset, width, ret, pfl->cmd, pfl->wcycle);
|
|
|
|
|
|
return ret;
|
|
return ret;
|
|
}
|
|
}
|
|
@@ -432,7 +432,7 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
|
|
uint8_t *p;
|
|
uint8_t *p;
|
|
uint8_t cmd;
|
|
uint8_t cmd;
|
|
|
|
|
|
- trace_pflash_io_write(offset, width, width << 1, value, pfl->wcycle);
|
|
|
|
|
|
+ trace_pflash_io_write(offset, width, value, pfl->wcycle);
|
|
cmd = value;
|
|
cmd = value;
|
|
if (pfl->cmd != 0xA0) {
|
|
if (pfl->cmd != 0xA0) {
|
|
/* Reset does nothing during chip erase and sector erase. */
|
|
/* Reset does nothing during chip erase and sector erase. */
|
|
@@ -542,7 +542,7 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
|
|
}
|
|
}
|
|
goto reset_flash;
|
|
goto reset_flash;
|
|
}
|
|
}
|
|
- trace_pflash_data_write(offset, width << 1, value, 0);
|
|
|
|
|
|
+ trace_pflash_data_write(offset, width, value, 0);
|
|
if (!pfl->ro) {
|
|
if (!pfl->ro) {
|
|
p = (uint8_t *)pfl->storage + offset;
|
|
p = (uint8_t *)pfl->storage + offset;
|
|
if (pfl->be) {
|
|
if (pfl->be) {
|