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@@ -70,7 +70,7 @@ struct IRQMP {
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unsigned int ncpus;
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IRQMPState *state;
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qemu_irq start_signal[IRQMP_MAX_CPU];
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- qemu_irq irq;
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+ qemu_irq irq[IRQMP_MAX_CPU];
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};
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struct IRQMPState {
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@@ -89,37 +89,35 @@ struct IRQMPState {
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static void grlib_irqmp_check_irqs(IRQMPState *state)
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{
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- uint32_t pend = 0;
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- uint32_t level0 = 0;
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- uint32_t level1 = 0;
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+ int i;
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assert(state != NULL);
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assert(state->parent != NULL);
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- /* IRQ for CPU 0 (no SMP support) */
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- pend = (state->pending | state->force[0])
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- & state->mask[0];
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-
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- level0 = pend & ~state->level;
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- level1 = pend & state->level;
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+ for (i = 0; i < state->parent->ncpus; i++) {
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+ uint32_t pend = (state->pending | state->force[i]) & state->mask[i];
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+ uint32_t level0 = pend & ~state->level;
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+ uint32_t level1 = pend & state->level;
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- trace_grlib_irqmp_check_irqs(state->pending, state->force[0],
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- state->mask[0], level1, level0);
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+ trace_grlib_irqmp_check_irqs(state->pending, state->force[i],
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+ state->mask[i], level1, level0);
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- /* Trigger level1 interrupt first and level0 if there is no level1 */
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- qemu_set_irq(state->parent->irq, level1 ?: level0);
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+ /* Trigger level1 interrupt first and level0 if there is no level1 */
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+ qemu_set_irq(state->parent->irq[i], level1 ?: level0);
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+ }
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}
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-static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask)
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+static void grlib_irqmp_ack_mask(IRQMPState *state, unsigned int cpu,
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+ uint32_t mask)
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{
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/* Clear registers */
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state->pending &= ~mask;
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- state->force[0] &= ~mask; /* Only CPU 0 (No SMP support) */
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+ state->force[cpu] &= ~mask;
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grlib_irqmp_check_irqs(state);
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}
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-void grlib_irqmp_ack(DeviceState *dev, int intno)
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+void grlib_irqmp_ack(DeviceState *dev, unsigned int cpu, int intno)
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{
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IRQMP *irqmp = GRLIB_IRQMP(dev);
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IRQMPState *state;
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@@ -133,7 +131,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno)
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trace_grlib_irqmp_ack(intno);
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- grlib_irqmp_ack_mask(state, mask);
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+ grlib_irqmp_ack_mask(state, cpu, mask);
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}
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static void grlib_irqmp_set_irq(void *opaque, int irq, int level)
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@@ -159,7 +157,6 @@ static void grlib_irqmp_set_irq(void *opaque, int irq, int level)
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s->pending |= 1 << irq;
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}
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grlib_irqmp_check_irqs(s);
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-
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}
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}
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@@ -263,7 +260,9 @@ static void grlib_irqmp_write(void *opaque, hwaddr addr,
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case CLEAR_OFFSET:
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value &= ~1; /* clean up the value */
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- grlib_irqmp_ack_mask(state, value);
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+ for (i = 0; i < irqmp->ncpus; i++) {
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+ grlib_irqmp_ack_mask(state, i, value);
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+ }
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return;
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case MP_STATUS_OFFSET:
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@@ -367,7 +366,7 @@ static void grlib_irqmp_realize(DeviceState *dev, Error **errp)
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*/
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qdev_init_gpio_out_named(dev, irqmp->start_signal, "grlib-start-cpu",
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IRQMP_MAX_CPU);
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- qdev_init_gpio_out_named(dev, &irqmp->irq, "grlib-irq", 1);
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+ qdev_init_gpio_out_named(dev, irqmp->irq, "grlib-irq", irqmp->ncpus);
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memory_region_init_io(&irqmp->iomem, OBJECT(dev), &grlib_irqmp_ops, irqmp,
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"irqmp", IRQMP_REG_SIZE);
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