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+/*
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+ * QEMU Motorla 680x0 Macintosh hardware System Emulator
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+ *
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+ * Permission is hereby granted, free of charge, to any person obtaining a copy
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+ * of this software and associated documentation files (the "Software"), to deal
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+ * in the Software without restriction, including without limitation the rights
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+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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+ * copies of the Software, and to permit persons to whom the Software is
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+ * furnished to do so, subject to the following conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be included in
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+ * all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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+ * THE SOFTWARE.
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+ */
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+
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+#include "qemu/osdep.h"
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+#include "qemu/units.h"
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+#include "qemu-common.h"
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+#include "sysemu/sysemu.h"
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+#include "cpu.h"
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+#include "hw/hw.h"
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+#include "hw/boards.h"
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+#include "hw/irq.h"
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+#include "elf.h"
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+#include "hw/loader.h"
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+#include "ui/console.h"
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+#include "exec/address-spaces.h"
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+#include "hw/char/escc.h"
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+#include "hw/sysbus.h"
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+#include "hw/scsi/esp.h"
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+#include "bootinfo.h"
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+#include "hw/misc/mac_via.h"
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+#include "hw/input/adb.h"
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+#include "hw/nubus/mac-nubus-bridge.h"
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+#include "hw/display/macfb.h"
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+#include "hw/block/swim.h"
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+#include "net/net.h"
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+#include "qapi/error.h"
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+#include "sysemu/qtest.h"
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+#include "sysemu/runstate.h"
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+#include "sysemu/reset.h"
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+
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+#define MACROM_ADDR 0x40000000
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+#define MACROM_SIZE 0x00100000
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+
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+#define MACROM_FILENAME "MacROM.bin"
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+
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+#define Q800_MACHINE_ID 35
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+#define Q800_CPU_ID (1 << 2)
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+#define Q800_FPU_ID (1 << 2)
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+#define Q800_MMU_ID (1 << 2)
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+
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+#define MACH_MAC 3
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+#define Q800_MAC_CPU_ID 2
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+
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+#define VIA_BASE 0x50f00000
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+#define SONIC_PROM_BASE 0x50f08000
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+#define SONIC_BASE 0x50f0a000
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+#define SCC_BASE 0x50f0c020
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+#define ESP_BASE 0x50f10000
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+#define ESP_PDMA 0x50f10100
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+#define ASC_BASE 0x50F14000
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+#define SWIM_BASE 0x50F1E000
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+#define NUBUS_SUPER_SLOT_BASE 0x60000000
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+#define NUBUS_SLOT_BASE 0xf0000000
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+
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+/*
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+ * the video base, whereas it a Nubus address,
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+ * is needed by the kernel to have early display and
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+ * thus provided by the bootloader
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+ */
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+#define VIDEO_BASE 0xf9001000
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+
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+#define MAC_CLOCK 3686418
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+
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+/*
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+ * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip
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+ * that performs a variety of functions (RAM management, clock generation, ...).
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+ * The GLUE chip receives interrupt requests from various devices,
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+ * assign priority to each, and asserts one or more interrupt line to the
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+ * CPU.
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+ */
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+
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+typedef struct {
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+ M68kCPU *cpu;
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+ uint8_t ipr;
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+} GLUEState;
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+
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+static void GLUE_set_irq(void *opaque, int irq, int level)
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+{
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+ GLUEState *s = opaque;
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+ int i;
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+
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+ if (level) {
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+ s->ipr |= 1 << irq;
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+ } else {
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+ s->ipr &= ~(1 << irq);
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+ }
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+
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+ for (i = 7; i >= 0; i--) {
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+ if ((s->ipr >> i) & 1) {
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+ m68k_set_irq_level(s->cpu, i + 1, i + 25);
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+ return;
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+ }
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+ }
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+ m68k_set_irq_level(s->cpu, 0, 0);
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+}
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+
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+static void main_cpu_reset(void *opaque)
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+{
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+ M68kCPU *cpu = opaque;
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+ CPUState *cs = CPU(cpu);
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+
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+ cpu_reset(cs);
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+ cpu->env.aregs[7] = ldl_phys(cs->as, 0);
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+ cpu->env.pc = ldl_phys(cs->as, 4);
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+}
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+
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+static void q800_init(MachineState *machine)
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+{
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+ M68kCPU *cpu = NULL;
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+ int linux_boot;
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+ int32_t kernel_size;
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+ uint64_t elf_entry;
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+ char *filename;
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+ int bios_size;
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+ ram_addr_t initrd_base;
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+ int32_t initrd_size;
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+ MemoryRegion *rom;
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+ MemoryRegion *ram;
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+ ram_addr_t ram_size = machine->ram_size;
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+ const char *kernel_filename = machine->kernel_filename;
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+ const char *initrd_filename = machine->initrd_filename;
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+ const char *kernel_cmdline = machine->kernel_cmdline;
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+ hwaddr parameters_base;
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+ CPUState *cs;
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+ DeviceState *dev;
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+ DeviceState *via_dev;
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+ SysBusESPState *sysbus_esp;
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+ ESPState *esp;
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+ SysBusDevice *sysbus;
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+ BusState *adb_bus;
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+ NubusBus *nubus;
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+ GLUEState *irq;
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+ qemu_irq *pic;
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+
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+ linux_boot = (kernel_filename != NULL);
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+
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+ if (ram_size > 1 * GiB) {
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+ error_report("Too much memory for this machine: %" PRId64 " MiB, "
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+ "maximum 1024 MiB", ram_size / MiB);
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+ exit(1);
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+ }
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+
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+ /* init CPUs */
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+ cpu = M68K_CPU(cpu_create(machine->cpu_type));
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+ qemu_register_reset(main_cpu_reset, cpu);
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+
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+ ram = g_malloc(sizeof(*ram));
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+ memory_region_init_ram(ram, NULL, "m68k_mac.ram", ram_size, &error_abort);
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+ memory_region_add_subregion(get_system_memory(), 0, ram);
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+
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+ /* IRQ Glue */
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+
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+ irq = g_new0(GLUEState, 1);
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+ irq->cpu = cpu;
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+ pic = qemu_allocate_irqs(GLUE_set_irq, irq, 8);
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+
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+ /* VIA */
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+
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+ via_dev = qdev_create(NULL, TYPE_MAC_VIA);
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+ qdev_init_nofail(via_dev);
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+ sysbus = SYS_BUS_DEVICE(via_dev);
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+ sysbus_mmio_map(sysbus, 0, VIA_BASE);
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+ qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 0, pic[0]);
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+ qdev_connect_gpio_out_named(DEVICE(sysbus), "irq", 1, pic[1]);
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+
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+
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+ adb_bus = qdev_get_child_bus(via_dev, "adb.0");
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+ dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
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+ qdev_init_nofail(dev);
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+ dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
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+ qdev_init_nofail(dev);
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+
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+ /* MACSONIC */
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+
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+ if (nb_nics > 1) {
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+ error_report("q800 can only have one ethernet interface");
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+ exit(1);
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+ }
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+
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+ qemu_check_nic_model(&nd_table[0], "dp83932");
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+
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+ /*
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+ * MacSonic driver needs an Apple MAC address
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+ * Valid prefix are:
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+ * 00:05:02 Apple
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+ * 00:80:19 Dayna Communications, Inc.
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+ * 00:A0:40 Apple
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+ * 08:00:07 Apple
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+ * (Q800 use the last one)
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+ */
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+ nd_table[0].macaddr.a[0] = 0x08;
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+ nd_table[0].macaddr.a[1] = 0x00;
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+ nd_table[0].macaddr.a[2] = 0x07;
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+
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+ dev = qdev_create(NULL, "dp8393x");
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+ qdev_set_nic_properties(dev, &nd_table[0]);
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+ qdev_prop_set_uint8(dev, "it_shift", 2);
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+ qdev_prop_set_bit(dev, "big_endian", true);
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+ qdev_prop_set_ptr(dev, "dma_mr", get_system_memory());
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+ qdev_init_nofail(dev);
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+ sysbus = SYS_BUS_DEVICE(dev);
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+ sysbus_mmio_map(sysbus, 0, SONIC_BASE);
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+ sysbus_mmio_map(sysbus, 1, SONIC_PROM_BASE);
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+ sysbus_connect_irq(sysbus, 0, pic[2]);
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+
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+ /* SCC */
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+
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+ dev = qdev_create(NULL, TYPE_ESCC);
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+ qdev_prop_set_uint32(dev, "disabled", 0);
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+ qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK);
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+ qdev_prop_set_uint32(dev, "it_shift", 1);
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+ qdev_prop_set_bit(dev, "bit_swap", true);
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+ qdev_prop_set_chr(dev, "chrA", serial_hd(0));
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+ qdev_prop_set_chr(dev, "chrB", serial_hd(1));
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+ qdev_prop_set_uint32(dev, "chnBtype", 0);
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+ qdev_prop_set_uint32(dev, "chnAtype", 0);
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+ qdev_init_nofail(dev);
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+ sysbus = SYS_BUS_DEVICE(dev);
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+ sysbus_connect_irq(sysbus, 0, pic[3]);
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+ sysbus_connect_irq(sysbus, 1, pic[3]);
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+ sysbus_mmio_map(sysbus, 0, SCC_BASE);
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+
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+ /* SCSI */
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+
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+ dev = qdev_create(NULL, TYPE_ESP);
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+ sysbus_esp = ESP_STATE(dev);
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+ esp = &sysbus_esp->esp;
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+ esp->dma_memory_read = NULL;
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+ esp->dma_memory_write = NULL;
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+ esp->dma_opaque = NULL;
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+ sysbus_esp->it_shift = 4;
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+ esp->dma_enabled = 1;
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+ qdev_init_nofail(dev);
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+
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+ sysbus = SYS_BUS_DEVICE(dev);
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+ sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in_named(via_dev,
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+ "via2-irq",
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+ VIA2_IRQ_SCSI_BIT));
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+ sysbus_connect_irq(sysbus, 1,
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+ qdev_get_gpio_in_named(via_dev, "via2-irq",
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+ VIA2_IRQ_SCSI_DATA_BIT));
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+ sysbus_mmio_map(sysbus, 0, ESP_BASE);
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+ sysbus_mmio_map(sysbus, 1, ESP_PDMA);
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+
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+ scsi_bus_legacy_handle_cmdline(&esp->bus);
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+
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+ /* SWIM floppy controller */
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+
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+ dev = qdev_create(NULL, TYPE_SWIM);
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+ qdev_init_nofail(dev);
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+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE);
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+
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+ /* NuBus */
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+
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+ dev = qdev_create(NULL, TYPE_MAC_NUBUS_BRIDGE);
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+ qdev_init_nofail(dev);
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+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, NUBUS_SUPER_SLOT_BASE);
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+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE);
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+
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+ nubus = MAC_NUBUS_BRIDGE(dev)->bus;
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+
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+ /* framebuffer in nubus slot #9 */
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+
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+ dev = qdev_create(BUS(nubus), TYPE_NUBUS_MACFB);
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+ qdev_prop_set_uint32(dev, "width", graphic_width);
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+ qdev_prop_set_uint32(dev, "height", graphic_height);
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+ qdev_prop_set_uint8(dev, "depth", graphic_depth);
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+ qdev_init_nofail(dev);
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+
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+ cs = CPU(cpu);
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+ if (linux_boot) {
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+ uint64_t high;
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+ kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
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+ &elf_entry, NULL, &high, 1,
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+ EM_68K, 0, 0);
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+ if (kernel_size < 0) {
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+ error_report("could not load kernel '%s'", kernel_filename);
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+ exit(1);
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+ }
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+ stl_phys(cs->as, 4, elf_entry); /* reset initial PC */
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+ parameters_base = (high + 1) & ~1;
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+
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+ BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC);
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+ BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, Q800_FPU_ID);
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+ BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, Q800_MMU_ID);
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+ BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, Q800_CPU_ID);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, Q800_MAC_CPU_ID);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, Q800_MACHINE_ID);
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+ BOOTINFO1(cs->as, parameters_base,
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+ BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */
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+ BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, VIDEO_BASE);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM,
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+ (graphic_height << 16) | graphic_width);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW,
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+ (graphic_width * graphic_depth + 7) / 8);
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+ BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE);
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+
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+ if (kernel_cmdline) {
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+ BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE,
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+ kernel_cmdline);
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+ }
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+
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+ /* load initrd */
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+ if (initrd_filename) {
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+ initrd_size = get_image_size(initrd_filename);
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+ if (initrd_size < 0) {
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+ error_report("could not load initial ram disk '%s'",
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+ initrd_filename);
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+ exit(1);
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+ }
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+
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+ initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
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+ load_image_targphys(initrd_filename, initrd_base,
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+ ram_size - initrd_base);
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+ BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base,
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+ initrd_size);
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+ } else {
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+ initrd_base = 0;
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+ initrd_size = 0;
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+ }
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+ BOOTINFO0(cs->as, parameters_base, BI_LAST);
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+ } else {
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+ uint8_t *ptr;
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+ /* allocate and load BIOS */
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+ rom = g_malloc(sizeof(*rom));
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+ memory_region_init_ram(rom, NULL, "m68k_mac.rom", MACROM_SIZE,
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+ &error_abort);
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+ if (bios_name == NULL) {
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+ bios_name = MACROM_FILENAME;
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+ }
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+ filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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+ memory_region_set_readonly(rom, true);
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+ memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom);
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+
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+ /* Load MacROM binary */
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+ if (filename) {
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+ bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE);
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+ g_free(filename);
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+ } else {
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+ bios_size = -1;
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+ }
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+
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+ /* Remove qtest_enabled() check once firmware files are in the tree */
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+ if (!qtest_enabled()) {
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+ if (bios_size < 0 || bios_size > MACROM_SIZE) {
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+ error_report("could not load MacROM '%s'", bios_name);
|
|
|
+ exit(1);
|
|
|
+ }
|
|
|
+
|
|
|
+ ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE);
|
|
|
+ stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */
|
|
|
+ stl_phys(cs->as, 4,
|
|
|
+ MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */
|
|
|
+ }
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+static void q800_machine_class_init(ObjectClass *oc, void *data)
|
|
|
+{
|
|
|
+ MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
+ mc->desc = "Macintosh Quadra 800";
|
|
|
+ mc->init = q800_init;
|
|
|
+ mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
|
|
|
+ mc->max_cpus = 1;
|
|
|
+ mc->is_default = 0;
|
|
|
+ mc->block_default_type = IF_SCSI;
|
|
|
+}
|
|
|
+
|
|
|
+static const TypeInfo q800_machine_typeinfo = {
|
|
|
+ .name = MACHINE_TYPE_NAME("q800"),
|
|
|
+ .parent = TYPE_MACHINE,
|
|
|
+ .class_init = q800_machine_class_init,
|
|
|
+};
|
|
|
+
|
|
|
+static void q800_machine_register_types(void)
|
|
|
+{
|
|
|
+ type_register_static(&q800_machine_typeinfo);
|
|
|
+}
|
|
|
+
|
|
|
+type_init(q800_machine_register_types)
|