LiveRegMatrix.cpp 5.5 KB

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  1. //===-- LiveRegMatrix.cpp - Track register interference -------------------===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file defines the LiveRegMatrix analysis pass.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #include "llvm/CodeGen/LiveRegMatrix.h"
  14. #include "RegisterCoalescer.h"
  15. #include "llvm/ADT/Statistic.h"
  16. #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  17. #include "llvm/CodeGen/MachineRegisterInfo.h"
  18. #include "llvm/CodeGen/VirtRegMap.h"
  19. #include "llvm/Support/Debug.h"
  20. #include "llvm/Support/raw_ostream.h"
  21. #include "llvm/Target/TargetMachine.h"
  22. #include "llvm/Target/TargetRegisterInfo.h"
  23. using namespace llvm;
  24. #define DEBUG_TYPE "regalloc"
  25. STATISTIC(NumAssigned , "Number of registers assigned");
  26. STATISTIC(NumUnassigned , "Number of registers unassigned");
  27. char LiveRegMatrix::ID = 0;
  28. INITIALIZE_PASS_BEGIN(LiveRegMatrix, "liveregmatrix",
  29. "Live Register Matrix", false, false)
  30. INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
  31. INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
  32. INITIALIZE_PASS_END(LiveRegMatrix, "liveregmatrix",
  33. "Live Register Matrix", false, false)
  34. LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID),
  35. UserTag(0), RegMaskTag(0), RegMaskVirtReg(0) {}
  36. void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const {
  37. AU.setPreservesAll();
  38. AU.addRequiredTransitive<LiveIntervals>();
  39. AU.addRequiredTransitive<VirtRegMap>();
  40. MachineFunctionPass::getAnalysisUsage(AU);
  41. }
  42. bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
  43. TRI = MF.getTarget().getSubtargetImpl()->getRegisterInfo();
  44. MRI = &MF.getRegInfo();
  45. LIS = &getAnalysis<LiveIntervals>();
  46. VRM = &getAnalysis<VirtRegMap>();
  47. unsigned NumRegUnits = TRI->getNumRegUnits();
  48. if (NumRegUnits != Matrix.size())
  49. Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
  50. Matrix.init(LIUAlloc, NumRegUnits);
  51. // Make sure no stale queries get reused.
  52. invalidateVirtRegs();
  53. return false;
  54. }
  55. void LiveRegMatrix::releaseMemory() {
  56. for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
  57. Matrix[i].clear();
  58. // No need to clear Queries here, since LiveIntervalUnion::Query doesn't
  59. // have anything important to clear and LiveRegMatrix's runOnFunction()
  60. // does a std::unique_ptr::reset anyways.
  61. }
  62. }
  63. void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) {
  64. DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
  65. << " to " << PrintReg(PhysReg, TRI) << ':');
  66. assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
  67. VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
  68. MRI->setPhysRegUsed(PhysReg);
  69. for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
  70. DEBUG(dbgs() << ' ' << PrintRegUnit(*Units, TRI));
  71. Matrix[*Units].unify(VirtReg);
  72. }
  73. ++NumAssigned;
  74. DEBUG(dbgs() << '\n');
  75. }
  76. void LiveRegMatrix::unassign(LiveInterval &VirtReg) {
  77. unsigned PhysReg = VRM->getPhys(VirtReg.reg);
  78. DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
  79. << " from " << PrintReg(PhysReg, TRI) << ':');
  80. VRM->clearVirt(VirtReg.reg);
  81. for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
  82. DEBUG(dbgs() << ' ' << PrintRegUnit(*Units, TRI));
  83. Matrix[*Units].extract(VirtReg);
  84. }
  85. ++NumUnassigned;
  86. DEBUG(dbgs() << '\n');
  87. }
  88. bool LiveRegMatrix::checkRegMaskInterference(LiveInterval &VirtReg,
  89. unsigned PhysReg) {
  90. // Check if the cached information is valid.
  91. // The same BitVector can be reused for all PhysRegs.
  92. // We could cache multiple VirtRegs if it becomes necessary.
  93. if (RegMaskVirtReg != VirtReg.reg || RegMaskTag != UserTag) {
  94. RegMaskVirtReg = VirtReg.reg;
  95. RegMaskTag = UserTag;
  96. RegMaskUsable.clear();
  97. LIS->checkRegMaskInterference(VirtReg, RegMaskUsable);
  98. }
  99. // The BitVector is indexed by PhysReg, not register unit.
  100. // Regmask interference is more fine grained than regunits.
  101. // For example, a Win64 call can clobber %ymm8 yet preserve %xmm8.
  102. return !RegMaskUsable.empty() && (!PhysReg || !RegMaskUsable.test(PhysReg));
  103. }
  104. bool LiveRegMatrix::checkRegUnitInterference(LiveInterval &VirtReg,
  105. unsigned PhysReg) {
  106. if (VirtReg.empty())
  107. return false;
  108. CoalescerPair CP(VirtReg.reg, PhysReg, *TRI);
  109. for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
  110. const LiveRange &UnitRange = LIS->getRegUnit(*Units);
  111. if (VirtReg.overlaps(UnitRange, CP, *LIS->getSlotIndexes()))
  112. return true;
  113. }
  114. return false;
  115. }
  116. LiveIntervalUnion::Query &LiveRegMatrix::query(LiveInterval &VirtReg,
  117. unsigned RegUnit) {
  118. LiveIntervalUnion::Query &Q = Queries[RegUnit];
  119. Q.init(UserTag, &VirtReg, &Matrix[RegUnit]);
  120. return Q;
  121. }
  122. LiveRegMatrix::InterferenceKind
  123. LiveRegMatrix::checkInterference(LiveInterval &VirtReg, unsigned PhysReg) {
  124. if (VirtReg.empty())
  125. return IK_Free;
  126. // Regmask interference is the fastest check.
  127. if (checkRegMaskInterference(VirtReg, PhysReg))
  128. return IK_RegMask;
  129. // Check for fixed interference.
  130. if (checkRegUnitInterference(VirtReg, PhysReg))
  131. return IK_RegUnit;
  132. // Check the matrix for virtual register interference.
  133. for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
  134. if (query(VirtReg, *Units).checkInterference())
  135. return IK_VirtReg;
  136. return IK_Free;
  137. }