TargetTest.cpp 2.5 KB

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  1. //===-- TargetTest.cpp ------------------------------------------*- C++ -*-===//
  2. //
  3. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
  4. // See https://llvm.org/LICENSE.txt for license information.
  5. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
  6. //
  7. //===----------------------------------------------------------------------===//
  8. #include "Target.h"
  9. #include <cassert>
  10. #include <memory>
  11. #include "MCTargetDesc/MipsMCTargetDesc.h"
  12. #include "llvm/Support/TargetRegistry.h"
  13. #include "llvm/Support/TargetSelect.h"
  14. #include "gmock/gmock.h"
  15. #include "gtest/gtest.h"
  16. namespace llvm {
  17. namespace exegesis {
  18. void InitializeMipsExegesisTarget();
  19. namespace {
  20. using testing::AllOf;
  21. using testing::ElementsAre;
  22. using testing::Eq;
  23. using testing::Matcher;
  24. using testing::Property;
  25. Matcher<MCOperand> IsImm(int64_t Value) {
  26. return AllOf(Property(&MCOperand::isImm, Eq(true)),
  27. Property(&MCOperand::getImm, Eq(Value)));
  28. }
  29. Matcher<MCOperand> IsReg(unsigned Reg) {
  30. return AllOf(Property(&MCOperand::isReg, Eq(true)),
  31. Property(&MCOperand::getReg, Eq(Reg)));
  32. }
  33. Matcher<MCInst> OpcodeIs(unsigned Opcode) {
  34. return Property(&MCInst::getOpcode, Eq(Opcode));
  35. }
  36. Matcher<MCInst> IsLoadLowImm(int64_t Reg, int64_t Value) {
  37. return AllOf(OpcodeIs(Mips::ORi),
  38. ElementsAre(IsReg(Reg), IsReg(Mips::ZERO), IsImm(Value)));
  39. }
  40. constexpr const char kTriple[] = "mips-unknown-linux";
  41. class MipsTargetTest : public ::testing::Test {
  42. protected:
  43. MipsTargetTest() : State(kTriple, "mips32", "") {}
  44. static void SetUpTestCase() {
  45. LLVMInitializeMipsTargetInfo();
  46. LLVMInitializeMipsTarget();
  47. LLVMInitializeMipsTargetMC();
  48. InitializeMipsExegesisTarget();
  49. }
  50. std::vector<MCInst> setRegTo(unsigned Reg, const APInt &Value) {
  51. return State.getExegesisTarget().setRegTo(State.getSubtargetInfo(), Reg,
  52. Value);
  53. }
  54. LLVMState State;
  55. };
  56. TEST_F(MipsTargetTest, SetRegToConstant) {
  57. const uint16_t Value = 0xFFFFU;
  58. const unsigned Reg = Mips::T0;
  59. EXPECT_THAT(setRegTo(Reg, APInt(16, Value)),
  60. ElementsAre(IsLoadLowImm(Reg, Value)));
  61. }
  62. TEST_F(MipsTargetTest, DefaultPfmCounters) {
  63. const std::string Expected = "CYCLES";
  64. EXPECT_EQ(State.getExegesisTarget().getPfmCounters("").CycleCounter,
  65. Expected);
  66. EXPECT_EQ(
  67. State.getExegesisTarget().getPfmCounters("unknown_cpu").CycleCounter,
  68. Expected);
  69. }
  70. } // namespace
  71. } // namespace exegesis
  72. } // namespace llvm