LiveStackAnalysis.cpp 2.0 KB

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  1. //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file implements the live stack slot analysis pass. It is analogous to
  11. // live interval analysis except it's analyzing liveness of stack slots rather
  12. // than registers.
  13. //
  14. //===----------------------------------------------------------------------===//
  15. #define DEBUG_TYPE "livestacks"
  16. #include "llvm/CodeGen/LiveStackAnalysis.h"
  17. #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  18. #include "llvm/CodeGen/Passes.h"
  19. #include "llvm/Target/TargetRegisterInfo.h"
  20. #include "llvm/Support/Debug.h"
  21. #include "llvm/Support/raw_ostream.h"
  22. #include "llvm/ADT/Statistic.h"
  23. #include <limits>
  24. using namespace llvm;
  25. char LiveStacks::ID = 0;
  26. static RegisterPass<LiveStacks> X("livestacks", "Live Stack Slot Analysis");
  27. void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
  28. AU.setPreservesAll();
  29. AU.addPreserved<SlotIndexes>();
  30. AU.addRequiredTransitive<SlotIndexes>();
  31. MachineFunctionPass::getAnalysisUsage(AU);
  32. }
  33. void LiveStacks::releaseMemory() {
  34. // Release VNInfo memroy regions after all VNInfo objects are dtor'd.
  35. VNInfoAllocator.Reset();
  36. S2IMap.clear();
  37. S2RCMap.clear();
  38. }
  39. bool LiveStacks::runOnMachineFunction(MachineFunction &) {
  40. // FIXME: No analysis is being done right now. We are relying on the
  41. // register allocators to provide the information.
  42. return false;
  43. }
  44. /// print - Implement the dump method.
  45. void LiveStacks::print(raw_ostream &OS, const Module*) const {
  46. OS << "********** INTERVALS **********\n";
  47. for (const_iterator I = begin(), E = end(); I != E; ++I) {
  48. I->second.print(OS);
  49. int Slot = I->first;
  50. const TargetRegisterClass *RC = getIntervalRegClass(Slot);
  51. if (RC)
  52. OS << " [" << RC->getName() << "]\n";
  53. else
  54. OS << " [Unknown]\n";
  55. }
  56. }