StackSlotColoring.cpp 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790
  1. //===-- StackSlotColoring.cpp - Stack slot coloring pass. -----------------===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file implements the stack slot coloring pass.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #define DEBUG_TYPE "stackcoloring"
  14. #include "VirtRegMap.h"
  15. #include "llvm/Function.h"
  16. #include "llvm/Module.h"
  17. #include "llvm/CodeGen/Passes.h"
  18. #include "llvm/CodeGen/LiveIntervalAnalysis.h"
  19. #include "llvm/CodeGen/LiveStackAnalysis.h"
  20. #include "llvm/CodeGen/MachineFrameInfo.h"
  21. #include "llvm/CodeGen/MachineLoopInfo.h"
  22. #include "llvm/CodeGen/MachineMemOperand.h"
  23. #include "llvm/CodeGen/MachineRegisterInfo.h"
  24. #include "llvm/CodeGen/PseudoSourceValue.h"
  25. #include "llvm/Support/CommandLine.h"
  26. #include "llvm/Support/Debug.h"
  27. #include "llvm/Target/TargetInstrInfo.h"
  28. #include "llvm/Target/TargetMachine.h"
  29. #include "llvm/ADT/BitVector.h"
  30. #include "llvm/ADT/SmallSet.h"
  31. #include "llvm/ADT/SmallVector.h"
  32. #include "llvm/ADT/Statistic.h"
  33. #include <vector>
  34. using namespace llvm;
  35. static cl::opt<bool>
  36. DisableSharing("no-stack-slot-sharing",
  37. cl::init(false), cl::Hidden,
  38. cl::desc("Suppress slot sharing during stack coloring"));
  39. static cl::opt<bool>
  40. ColorWithRegsOpt("color-ss-with-regs",
  41. cl::init(false), cl::Hidden,
  42. cl::desc("Color stack slots with free registers"));
  43. static cl::opt<int> DCELimit("ssc-dce-limit", cl::init(-1), cl::Hidden);
  44. STATISTIC(NumEliminated, "Number of stack slots eliminated due to coloring");
  45. STATISTIC(NumRegRepl, "Number of stack slot refs replaced with reg refs");
  46. STATISTIC(NumLoadElim, "Number of loads eliminated");
  47. STATISTIC(NumStoreElim, "Number of stores eliminated");
  48. STATISTIC(NumDead, "Number of trivially dead stack accesses eliminated");
  49. namespace {
  50. class StackSlotColoring : public MachineFunctionPass {
  51. bool ColorWithRegs;
  52. LiveStacks* LS;
  53. VirtRegMap* VRM;
  54. MachineFrameInfo *MFI;
  55. MachineRegisterInfo *MRI;
  56. const TargetInstrInfo *TII;
  57. const TargetRegisterInfo *TRI;
  58. const MachineLoopInfo *loopInfo;
  59. // SSIntervals - Spill slot intervals.
  60. std::vector<LiveInterval*> SSIntervals;
  61. // SSRefs - Keep a list of frame index references for each spill slot.
  62. SmallVector<SmallVector<MachineInstr*, 8>, 16> SSRefs;
  63. // OrigAlignments - Alignments of stack objects before coloring.
  64. SmallVector<unsigned, 16> OrigAlignments;
  65. // OrigSizes - Sizess of stack objects before coloring.
  66. SmallVector<unsigned, 16> OrigSizes;
  67. // AllColors - If index is set, it's a spill slot, i.e. color.
  68. // FIXME: This assumes PEI locate spill slot with smaller indices
  69. // closest to stack pointer / frame pointer. Therefore, smaller
  70. // index == better color.
  71. BitVector AllColors;
  72. // NextColor - Next "color" that's not yet used.
  73. int NextColor;
  74. // UsedColors - "Colors" that have been assigned.
  75. BitVector UsedColors;
  76. // Assignments - Color to intervals mapping.
  77. SmallVector<SmallVector<LiveInterval*,4>, 16> Assignments;
  78. public:
  79. static char ID; // Pass identification
  80. StackSlotColoring() :
  81. MachineFunctionPass(&ID), ColorWithRegs(false), NextColor(-1) {}
  82. StackSlotColoring(bool RegColor) :
  83. MachineFunctionPass(&ID), ColorWithRegs(RegColor), NextColor(-1) {}
  84. virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  85. AU.setPreservesCFG();
  86. AU.addRequired<SlotIndexes>();
  87. AU.addPreserved<SlotIndexes>();
  88. AU.addRequired<LiveStacks>();
  89. AU.addRequired<VirtRegMap>();
  90. AU.addPreserved<VirtRegMap>();
  91. AU.addRequired<MachineLoopInfo>();
  92. AU.addPreserved<MachineLoopInfo>();
  93. AU.addPreservedID(MachineDominatorsID);
  94. MachineFunctionPass::getAnalysisUsage(AU);
  95. }
  96. virtual bool runOnMachineFunction(MachineFunction &MF);
  97. virtual const char* getPassName() const {
  98. return "Stack Slot Coloring";
  99. }
  100. private:
  101. void InitializeSlots();
  102. bool CheckForSetJmpCall(const MachineFunction &MF) const;
  103. void ScanForSpillSlotRefs(MachineFunction &MF);
  104. bool OverlapWithAssignments(LiveInterval *li, int Color) const;
  105. int ColorSlot(LiveInterval *li);
  106. bool ColorSlots(MachineFunction &MF);
  107. bool ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
  108. SmallVector<SmallVector<int, 4>, 16> &RevMap,
  109. BitVector &SlotIsReg);
  110. void RewriteInstruction(MachineInstr *MI, int OldFI, int NewFI,
  111. MachineFunction &MF);
  112. bool PropagateBackward(MachineBasicBlock::iterator MII,
  113. MachineBasicBlock *MBB,
  114. unsigned OldReg, unsigned NewReg);
  115. bool PropagateForward(MachineBasicBlock::iterator MII,
  116. MachineBasicBlock *MBB,
  117. unsigned OldReg, unsigned NewReg);
  118. void UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
  119. unsigned Reg, const TargetRegisterClass *RC,
  120. SmallSet<unsigned, 4> &Defs,
  121. MachineFunction &MF);
  122. bool AllMemRefsCanBeUnfolded(int SS);
  123. bool RemoveDeadStores(MachineBasicBlock* MBB);
  124. };
  125. } // end anonymous namespace
  126. char StackSlotColoring::ID = 0;
  127. static RegisterPass<StackSlotColoring>
  128. X("stack-slot-coloring", "Stack Slot Coloring");
  129. FunctionPass *llvm::createStackSlotColoringPass(bool RegColor) {
  130. return new StackSlotColoring(RegColor);
  131. }
  132. namespace {
  133. // IntervalSorter - Comparison predicate that sort live intervals by
  134. // their weight.
  135. struct IntervalSorter {
  136. bool operator()(LiveInterval* LHS, LiveInterval* RHS) const {
  137. return LHS->weight > RHS->weight;
  138. }
  139. };
  140. }
  141. /// CheckForSetJmpCall - Return true if there's a call to setjmp/sigsetjmp in
  142. /// this function.
  143. bool StackSlotColoring::CheckForSetJmpCall(const MachineFunction &MF) const {
  144. const Function *F = MF.getFunction();
  145. const Module *M = F->getParent();
  146. const Function *SetJmp = M->getFunction("setjmp");
  147. const Function *SigSetJmp = M->getFunction("sigsetjmp");
  148. if (!SetJmp && !SigSetJmp)
  149. return false;
  150. if (SetJmp && !SetJmp->use_empty())
  151. for (Value::const_use_iterator
  152. I = SetJmp->use_begin(), E = SetJmp->use_end(); I != E; ++I)
  153. if (const CallInst *CI = dyn_cast<CallInst>(I))
  154. if (CI->getParent()->getParent() == F)
  155. return true;
  156. if (SigSetJmp && !SigSetJmp->use_empty())
  157. for (Value::const_use_iterator
  158. I = SigSetJmp->use_begin(), E = SigSetJmp->use_end(); I != E; ++I)
  159. if (const CallInst *CI = dyn_cast<CallInst>(I))
  160. if (CI->getParent()->getParent() == F)
  161. return true;
  162. return false;
  163. }
  164. /// ScanForSpillSlotRefs - Scan all the machine instructions for spill slot
  165. /// references and update spill slot weights.
  166. void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
  167. SSRefs.resize(MFI->getObjectIndexEnd());
  168. // FIXME: Need the equivalent of MachineRegisterInfo for frameindex operands.
  169. for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
  170. MBBI != E; ++MBBI) {
  171. MachineBasicBlock *MBB = &*MBBI;
  172. unsigned loopDepth = loopInfo->getLoopDepth(MBB);
  173. for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end();
  174. MII != EE; ++MII) {
  175. MachineInstr *MI = &*MII;
  176. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
  177. MachineOperand &MO = MI->getOperand(i);
  178. if (!MO.isFI())
  179. continue;
  180. int FI = MO.getIndex();
  181. if (FI < 0)
  182. continue;
  183. if (!LS->hasInterval(FI))
  184. continue;
  185. LiveInterval &li = LS->getInterval(FI);
  186. if (!MI->isDebugValue())
  187. li.weight += LiveIntervals::getSpillWeight(false, true, loopDepth);
  188. SSRefs[FI].push_back(MI);
  189. }
  190. }
  191. }
  192. }
  193. /// InitializeSlots - Process all spill stack slot liveintervals and add them
  194. /// to a sorted (by weight) list.
  195. void StackSlotColoring::InitializeSlots() {
  196. int LastFI = MFI->getObjectIndexEnd();
  197. OrigAlignments.resize(LastFI);
  198. OrigSizes.resize(LastFI);
  199. AllColors.resize(LastFI);
  200. UsedColors.resize(LastFI);
  201. Assignments.resize(LastFI);
  202. // Gather all spill slots into a list.
  203. DEBUG(dbgs() << "Spill slot intervals:\n");
  204. for (LiveStacks::iterator i = LS->begin(), e = LS->end(); i != e; ++i) {
  205. LiveInterval &li = i->second;
  206. DEBUG(li.dump());
  207. int FI = li.getStackSlotIndex();
  208. if (MFI->isDeadObjectIndex(FI))
  209. continue;
  210. SSIntervals.push_back(&li);
  211. OrigAlignments[FI] = MFI->getObjectAlignment(FI);
  212. OrigSizes[FI] = MFI->getObjectSize(FI);
  213. AllColors.set(FI);
  214. }
  215. DEBUG(dbgs() << '\n');
  216. // Sort them by weight.
  217. std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
  218. // Get first "color".
  219. NextColor = AllColors.find_first();
  220. }
  221. /// OverlapWithAssignments - Return true if LiveInterval overlaps with any
  222. /// LiveIntervals that have already been assigned to the specified color.
  223. bool
  224. StackSlotColoring::OverlapWithAssignments(LiveInterval *li, int Color) const {
  225. const SmallVector<LiveInterval*,4> &OtherLIs = Assignments[Color];
  226. for (unsigned i = 0, e = OtherLIs.size(); i != e; ++i) {
  227. LiveInterval *OtherLI = OtherLIs[i];
  228. if (OtherLI->overlaps(*li))
  229. return true;
  230. }
  231. return false;
  232. }
  233. /// ColorSlotsWithFreeRegs - If there are any free registers available, try
  234. /// replacing spill slots references with registers instead.
  235. bool
  236. StackSlotColoring::ColorSlotsWithFreeRegs(SmallVector<int, 16> &SlotMapping,
  237. SmallVector<SmallVector<int, 4>, 16> &RevMap,
  238. BitVector &SlotIsReg) {
  239. if (!(ColorWithRegs || ColorWithRegsOpt) || !VRM->HasUnusedRegisters())
  240. return false;
  241. bool Changed = false;
  242. DEBUG(dbgs() << "Assigning unused registers to spill slots:\n");
  243. for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
  244. LiveInterval *li = SSIntervals[i];
  245. int SS = li->getStackSlotIndex();
  246. if (!UsedColors[SS] || li->weight < 20)
  247. // If the weight is < 20, i.e. two references in a loop with depth 1,
  248. // don't bother with it.
  249. continue;
  250. // These slots allow to share the same registers.
  251. bool AllColored = true;
  252. SmallVector<unsigned, 4> ColoredRegs;
  253. for (unsigned j = 0, ee = RevMap[SS].size(); j != ee; ++j) {
  254. int RSS = RevMap[SS][j];
  255. const TargetRegisterClass *RC = LS->getIntervalRegClass(RSS);
  256. // If it's not colored to another stack slot, try coloring it
  257. // to a "free" register.
  258. if (!RC) {
  259. AllColored = false;
  260. continue;
  261. }
  262. unsigned Reg = VRM->getFirstUnusedRegister(RC);
  263. if (!Reg) {
  264. AllColored = false;
  265. continue;
  266. }
  267. if (!AllMemRefsCanBeUnfolded(RSS)) {
  268. AllColored = false;
  269. continue;
  270. } else {
  271. DEBUG(dbgs() << "Assigning fi#" << RSS << " to "
  272. << TRI->getName(Reg) << '\n');
  273. ColoredRegs.push_back(Reg);
  274. SlotMapping[RSS] = Reg;
  275. SlotIsReg.set(RSS);
  276. Changed = true;
  277. }
  278. }
  279. // Register and its sub-registers are no longer free.
  280. while (!ColoredRegs.empty()) {
  281. unsigned Reg = ColoredRegs.back();
  282. ColoredRegs.pop_back();
  283. VRM->setRegisterUsed(Reg);
  284. // If reg is a callee-saved register, it will have to be spilled in
  285. // the prologue.
  286. MRI->setPhysRegUsed(Reg);
  287. for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
  288. VRM->setRegisterUsed(*AS);
  289. MRI->setPhysRegUsed(*AS);
  290. }
  291. }
  292. // This spill slot is dead after the rewrites
  293. if (AllColored) {
  294. MFI->RemoveStackObject(SS);
  295. ++NumEliminated;
  296. }
  297. }
  298. DEBUG(dbgs() << '\n');
  299. return Changed;
  300. }
  301. /// ColorSlot - Assign a "color" (stack slot) to the specified stack slot.
  302. ///
  303. int StackSlotColoring::ColorSlot(LiveInterval *li) {
  304. int Color = -1;
  305. bool Share = false;
  306. if (!DisableSharing) {
  307. // Check if it's possible to reuse any of the used colors.
  308. Color = UsedColors.find_first();
  309. while (Color != -1) {
  310. if (!OverlapWithAssignments(li, Color)) {
  311. Share = true;
  312. ++NumEliminated;
  313. break;
  314. }
  315. Color = UsedColors.find_next(Color);
  316. }
  317. }
  318. // Assign it to the first available color (assumed to be the best) if it's
  319. // not possible to share a used color with other objects.
  320. if (!Share) {
  321. assert(NextColor != -1 && "No more spill slots?");
  322. Color = NextColor;
  323. UsedColors.set(Color);
  324. NextColor = AllColors.find_next(NextColor);
  325. }
  326. // Record the assignment.
  327. Assignments[Color].push_back(li);
  328. int FI = li->getStackSlotIndex();
  329. DEBUG(dbgs() << "Assigning fi#" << FI << " to fi#" << Color << "\n");
  330. // Change size and alignment of the allocated slot. If there are multiple
  331. // objects sharing the same slot, then make sure the size and alignment
  332. // are large enough for all.
  333. unsigned Align = OrigAlignments[FI];
  334. if (!Share || Align > MFI->getObjectAlignment(Color))
  335. MFI->setObjectAlignment(Color, Align);
  336. int64_t Size = OrigSizes[FI];
  337. if (!Share || Size > MFI->getObjectSize(Color))
  338. MFI->setObjectSize(Color, Size);
  339. return Color;
  340. }
  341. /// Colorslots - Color all spill stack slots and rewrite all frameindex machine
  342. /// operands in the function.
  343. bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
  344. unsigned NumObjs = MFI->getObjectIndexEnd();
  345. SmallVector<int, 16> SlotMapping(NumObjs, -1);
  346. SmallVector<float, 16> SlotWeights(NumObjs, 0.0);
  347. SmallVector<SmallVector<int, 4>, 16> RevMap(NumObjs);
  348. BitVector SlotIsReg(NumObjs);
  349. BitVector UsedColors(NumObjs);
  350. DEBUG(dbgs() << "Color spill slot intervals:\n");
  351. bool Changed = false;
  352. for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
  353. LiveInterval *li = SSIntervals[i];
  354. int SS = li->getStackSlotIndex();
  355. int NewSS = ColorSlot(li);
  356. assert(NewSS >= 0 && "Stack coloring failed?");
  357. SlotMapping[SS] = NewSS;
  358. RevMap[NewSS].push_back(SS);
  359. SlotWeights[NewSS] += li->weight;
  360. UsedColors.set(NewSS);
  361. Changed |= (SS != NewSS);
  362. }
  363. DEBUG(dbgs() << "\nSpill slots after coloring:\n");
  364. for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i) {
  365. LiveInterval *li = SSIntervals[i];
  366. int SS = li->getStackSlotIndex();
  367. li->weight = SlotWeights[SS];
  368. }
  369. // Sort them by new weight.
  370. std::stable_sort(SSIntervals.begin(), SSIntervals.end(), IntervalSorter());
  371. #ifndef NDEBUG
  372. for (unsigned i = 0, e = SSIntervals.size(); i != e; ++i)
  373. DEBUG(SSIntervals[i]->dump());
  374. DEBUG(dbgs() << '\n');
  375. #endif
  376. // Can we "color" a stack slot with a unused register?
  377. Changed |= ColorSlotsWithFreeRegs(SlotMapping, RevMap, SlotIsReg);
  378. if (!Changed)
  379. return false;
  380. // Rewrite all MO_FrameIndex operands.
  381. SmallVector<SmallSet<unsigned, 4>, 4> NewDefs(MF.getNumBlockIDs());
  382. for (unsigned SS = 0, SE = SSRefs.size(); SS != SE; ++SS) {
  383. bool isReg = SlotIsReg[SS];
  384. int NewFI = SlotMapping[SS];
  385. if (NewFI == -1 || (NewFI == (int)SS && !isReg))
  386. continue;
  387. const TargetRegisterClass *RC = LS->getIntervalRegClass(SS);
  388. SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
  389. for (unsigned i = 0, e = RefMIs.size(); i != e; ++i)
  390. if (!isReg)
  391. RewriteInstruction(RefMIs[i], SS, NewFI, MF);
  392. else {
  393. // Rewrite to use a register instead.
  394. unsigned MBBId = RefMIs[i]->getParent()->getNumber();
  395. SmallSet<unsigned, 4> &Defs = NewDefs[MBBId];
  396. UnfoldAndRewriteInstruction(RefMIs[i], SS, NewFI, RC, Defs, MF);
  397. }
  398. }
  399. // Delete unused stack slots.
  400. while (NextColor != -1) {
  401. DEBUG(dbgs() << "Removing unused stack object fi#" << NextColor << "\n");
  402. MFI->RemoveStackObject(NextColor);
  403. NextColor = AllColors.find_next(NextColor);
  404. }
  405. return true;
  406. }
  407. /// AllMemRefsCanBeUnfolded - Return true if all references of the specified
  408. /// spill slot index can be unfolded.
  409. bool StackSlotColoring::AllMemRefsCanBeUnfolded(int SS) {
  410. SmallVector<MachineInstr*, 8> &RefMIs = SSRefs[SS];
  411. for (unsigned i = 0, e = RefMIs.size(); i != e; ++i) {
  412. MachineInstr *MI = RefMIs[i];
  413. if (TII->isLoadFromStackSlot(MI, SS) ||
  414. TII->isStoreToStackSlot(MI, SS))
  415. // Restore and spill will become copies.
  416. return true;
  417. if (!TII->getOpcodeAfterMemoryUnfold(MI->getOpcode(), false, false))
  418. return false;
  419. for (unsigned j = 0, ee = MI->getNumOperands(); j != ee; ++j) {
  420. MachineOperand &MO = MI->getOperand(j);
  421. if (MO.isFI() && MO.getIndex() != SS)
  422. // If it uses another frameindex, we can, currently* unfold it.
  423. return false;
  424. }
  425. }
  426. return true;
  427. }
  428. /// RewriteInstruction - Rewrite specified instruction by replacing references
  429. /// to old frame index with new one.
  430. void StackSlotColoring::RewriteInstruction(MachineInstr *MI, int OldFI,
  431. int NewFI, MachineFunction &MF) {
  432. // Update the operands.
  433. for (unsigned i = 0, ee = MI->getNumOperands(); i != ee; ++i) {
  434. MachineOperand &MO = MI->getOperand(i);
  435. if (!MO.isFI())
  436. continue;
  437. int FI = MO.getIndex();
  438. if (FI != OldFI)
  439. continue;
  440. MO.setIndex(NewFI);
  441. }
  442. // Update the memory references. This changes the MachineMemOperands
  443. // directly. They may be in use by multiple instructions, however all
  444. // instructions using OldFI are being rewritten to use NewFI.
  445. const Value *OldSV = PseudoSourceValue::getFixedStack(OldFI);
  446. const Value *NewSV = PseudoSourceValue::getFixedStack(NewFI);
  447. for (MachineInstr::mmo_iterator I = MI->memoperands_begin(),
  448. E = MI->memoperands_end(); I != E; ++I)
  449. if ((*I)->getValue() == OldSV)
  450. (*I)->setValue(NewSV);
  451. }
  452. /// PropagateBackward - Traverse backward and look for the definition of
  453. /// OldReg. If it can successfully update all of the references with NewReg,
  454. /// do so and return true.
  455. bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII,
  456. MachineBasicBlock *MBB,
  457. unsigned OldReg, unsigned NewReg) {
  458. if (MII == MBB->begin())
  459. return false;
  460. SmallVector<MachineOperand*, 4> Uses;
  461. SmallVector<MachineOperand*, 4> Refs;
  462. while (--MII != MBB->begin()) {
  463. bool FoundDef = false; // Not counting 2address def.
  464. Uses.clear();
  465. const TargetInstrDesc &TID = MII->getDesc();
  466. for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
  467. MachineOperand &MO = MII->getOperand(i);
  468. if (!MO.isReg())
  469. continue;
  470. unsigned Reg = MO.getReg();
  471. if (Reg == 0)
  472. continue;
  473. if (Reg == OldReg) {
  474. if (MO.isImplicit())
  475. return false;
  476. // Abort the use is actually a sub-register def. We don't have enough
  477. // information to figure out if it is really legal.
  478. if (MO.getSubReg() || MII->isExtractSubreg() ||
  479. MII->isInsertSubreg() || MII->isSubregToReg())
  480. return false;
  481. const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
  482. if (RC && !RC->contains(NewReg))
  483. return false;
  484. if (MO.isUse()) {
  485. Uses.push_back(&MO);
  486. } else {
  487. Refs.push_back(&MO);
  488. if (!MII->isRegTiedToUseOperand(i))
  489. FoundDef = true;
  490. }
  491. } else if (TRI->regsOverlap(Reg, NewReg)) {
  492. return false;
  493. } else if (TRI->regsOverlap(Reg, OldReg)) {
  494. if (!MO.isUse() || !MO.isKill())
  495. return false;
  496. }
  497. }
  498. if (FoundDef) {
  499. // Found non-two-address def. Stop here.
  500. for (unsigned i = 0, e = Refs.size(); i != e; ++i)
  501. Refs[i]->setReg(NewReg);
  502. return true;
  503. }
  504. // Two-address uses must be updated as well.
  505. for (unsigned i = 0, e = Uses.size(); i != e; ++i)
  506. Refs.push_back(Uses[i]);
  507. }
  508. return false;
  509. }
  510. /// PropagateForward - Traverse forward and look for the kill of OldReg. If
  511. /// it can successfully update all of the uses with NewReg, do so and
  512. /// return true.
  513. bool StackSlotColoring::PropagateForward(MachineBasicBlock::iterator MII,
  514. MachineBasicBlock *MBB,
  515. unsigned OldReg, unsigned NewReg) {
  516. if (MII == MBB->end())
  517. return false;
  518. SmallVector<MachineOperand*, 4> Uses;
  519. while (++MII != MBB->end()) {
  520. bool FoundKill = false;
  521. const TargetInstrDesc &TID = MII->getDesc();
  522. for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
  523. MachineOperand &MO = MII->getOperand(i);
  524. if (!MO.isReg())
  525. continue;
  526. unsigned Reg = MO.getReg();
  527. if (Reg == 0)
  528. continue;
  529. if (Reg == OldReg) {
  530. if (MO.isDef() || MO.isImplicit())
  531. return false;
  532. // Abort the use is actually a sub-register use. We don't have enough
  533. // information to figure out if it is really legal.
  534. if (MO.getSubReg() || MII->isExtractSubreg())
  535. return false;
  536. const TargetRegisterClass *RC = TID.OpInfo[i].getRegClass(TRI);
  537. if (RC && !RC->contains(NewReg))
  538. return false;
  539. if (MO.isKill())
  540. FoundKill = true;
  541. Uses.push_back(&MO);
  542. } else if (TRI->regsOverlap(Reg, NewReg) ||
  543. TRI->regsOverlap(Reg, OldReg))
  544. return false;
  545. }
  546. if (FoundKill) {
  547. for (unsigned i = 0, e = Uses.size(); i != e; ++i)
  548. Uses[i]->setReg(NewReg);
  549. return true;
  550. }
  551. }
  552. return false;
  553. }
  554. /// UnfoldAndRewriteInstruction - Rewrite specified instruction by unfolding
  555. /// folded memory references and replacing those references with register
  556. /// references instead.
  557. void
  558. StackSlotColoring::UnfoldAndRewriteInstruction(MachineInstr *MI, int OldFI,
  559. unsigned Reg,
  560. const TargetRegisterClass *RC,
  561. SmallSet<unsigned, 4> &Defs,
  562. MachineFunction &MF) {
  563. MachineBasicBlock *MBB = MI->getParent();
  564. if (unsigned DstReg = TII->isLoadFromStackSlot(MI, OldFI)) {
  565. if (PropagateForward(MI, MBB, DstReg, Reg)) {
  566. DEBUG(dbgs() << "Eliminated load: ");
  567. DEBUG(MI->dump());
  568. ++NumLoadElim;
  569. } else {
  570. TII->copyRegToReg(*MBB, MI, DstReg, Reg, RC, RC,
  571. MI->getDebugLoc());
  572. ++NumRegRepl;
  573. }
  574. if (!Defs.count(Reg)) {
  575. // If this is the first use of Reg in this MBB and it wasn't previously
  576. // defined in MBB, add it to livein.
  577. MBB->addLiveIn(Reg);
  578. Defs.insert(Reg);
  579. }
  580. } else if (unsigned SrcReg = TII->isStoreToStackSlot(MI, OldFI)) {
  581. if (MI->killsRegister(SrcReg) && PropagateBackward(MI, MBB, SrcReg, Reg)) {
  582. DEBUG(dbgs() << "Eliminated store: ");
  583. DEBUG(MI->dump());
  584. ++NumStoreElim;
  585. } else {
  586. TII->copyRegToReg(*MBB, MI, Reg, SrcReg, RC, RC,
  587. MI->getDebugLoc());
  588. ++NumRegRepl;
  589. }
  590. // Remember reg has been defined in MBB.
  591. Defs.insert(Reg);
  592. } else {
  593. SmallVector<MachineInstr*, 4> NewMIs;
  594. bool Success = TII->unfoldMemoryOperand(MF, MI, Reg, false, false, NewMIs);
  595. Success = Success; // Silence compiler warning.
  596. assert(Success && "Failed to unfold!");
  597. MachineInstr *NewMI = NewMIs[0];
  598. MBB->insert(MI, NewMI);
  599. ++NumRegRepl;
  600. if (NewMI->readsRegister(Reg)) {
  601. if (!Defs.count(Reg))
  602. // If this is the first use of Reg in this MBB and it wasn't previously
  603. // defined in MBB, add it to livein.
  604. MBB->addLiveIn(Reg);
  605. Defs.insert(Reg);
  606. }
  607. }
  608. MBB->erase(MI);
  609. }
  610. /// RemoveDeadStores - Scan through a basic block and look for loads followed
  611. /// by stores. If they're both using the same stack slot, then the store is
  612. /// definitely dead. This could obviously be much more aggressive (consider
  613. /// pairs with instructions between them), but such extensions might have a
  614. /// considerable compile time impact.
  615. bool StackSlotColoring::RemoveDeadStores(MachineBasicBlock* MBB) {
  616. // FIXME: This could be much more aggressive, but we need to investigate
  617. // the compile time impact of doing so.
  618. bool changed = false;
  619. SmallVector<MachineInstr*, 4> toErase;
  620. for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
  621. I != E; ++I) {
  622. if (DCELimit != -1 && (int)NumDead >= DCELimit)
  623. break;
  624. MachineBasicBlock::iterator NextMI = llvm::next(I);
  625. if (NextMI == MBB->end()) continue;
  626. int FirstSS, SecondSS;
  627. unsigned LoadReg = 0;
  628. unsigned StoreReg = 0;
  629. if (!(LoadReg = TII->isLoadFromStackSlot(I, FirstSS))) continue;
  630. if (!(StoreReg = TII->isStoreToStackSlot(NextMI, SecondSS))) continue;
  631. if (FirstSS != SecondSS || LoadReg != StoreReg || FirstSS == -1) continue;
  632. ++NumDead;
  633. changed = true;
  634. if (NextMI->findRegisterUseOperandIdx(LoadReg, true, 0) != -1) {
  635. ++NumDead;
  636. toErase.push_back(I);
  637. }
  638. toErase.push_back(NextMI);
  639. ++I;
  640. }
  641. for (SmallVector<MachineInstr*, 4>::iterator I = toErase.begin(),
  642. E = toErase.end(); I != E; ++I)
  643. (*I)->eraseFromParent();
  644. return changed;
  645. }
  646. bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
  647. DEBUG({
  648. dbgs() << "********** Stack Slot Coloring **********\n"
  649. << "********** Function: "
  650. << MF.getFunction()->getName() << '\n';
  651. });
  652. MFI = MF.getFrameInfo();
  653. MRI = &MF.getRegInfo();
  654. TII = MF.getTarget().getInstrInfo();
  655. TRI = MF.getTarget().getRegisterInfo();
  656. LS = &getAnalysis<LiveStacks>();
  657. VRM = &getAnalysis<VirtRegMap>();
  658. loopInfo = &getAnalysis<MachineLoopInfo>();
  659. bool Changed = false;
  660. unsigned NumSlots = LS->getNumIntervals();
  661. if (NumSlots < 2) {
  662. if (NumSlots == 0 || !VRM->HasUnusedRegisters())
  663. // Nothing to do!
  664. return false;
  665. }
  666. // If there are calls to setjmp or sigsetjmp, don't perform stack slot
  667. // coloring. The stack could be modified before the longjmp is executed,
  668. // resulting in the wrong value being used afterwards. (See
  669. // <rdar://problem/8007500>.)
  670. //
  671. // FIXME: This goes beyond the setjmp/sigsetjmp functions. Ideally, we should
  672. // check for the GCC "returns twice" attribute.
  673. if (CheckForSetJmpCall(MF))
  674. return false;
  675. // Gather spill slot references
  676. ScanForSpillSlotRefs(MF);
  677. InitializeSlots();
  678. Changed = ColorSlots(MF);
  679. NextColor = -1;
  680. SSIntervals.clear();
  681. for (unsigned i = 0, e = SSRefs.size(); i != e; ++i)
  682. SSRefs[i].clear();
  683. SSRefs.clear();
  684. OrigAlignments.clear();
  685. OrigSizes.clear();
  686. AllColors.clear();
  687. UsedColors.clear();
  688. for (unsigned i = 0, e = Assignments.size(); i != e; ++i)
  689. Assignments[i].clear();
  690. Assignments.clear();
  691. if (Changed) {
  692. for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
  693. Changed |= RemoveDeadStores(I);
  694. }
  695. return Changed;
  696. }