 Teresa Johnson
|
ef512ca8e6
Change TargetLibraryInfo analysis passes to always require Function
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6 年之前 |
 Jonas Devlieghere
|
114087caa6
[llvm] Migrate llvm::make_unique to std::make_unique
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6 年之前 |
 Daniel Sanders
|
c7a3c5c5d1
Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
6 年之前 |
 Matt Arsenault
|
3336cab34b
TableGen: Support physical register inputs > 255
|
6 年之前 |
 Reid Kleckner
|
93b27c50e8
Standardize on MSVC behavior for triples with no environment
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6 年之前 |
|
Matt Arsenault
|
a2b05bc24d
CodeGen: Introduce a class for registers
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6 年之前 |
|
Matt Arsenault
|
5b56cc85b0
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
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6 年之前 |
 Francis Visoiu Mistrih
|
c030038e73
[FastISel] Skip creating unnecessary vregs for arguments
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6 年之前 |
 Amara Emerson
|
27a3c6c8d9
Factor out SelectionDAG's switch analysis and lowering into a separate component.
|
6 年之前 |
 Ulrich Weigand
|
ef54162998
Allow target to handle STRICT floating-point nodes
|
6 年之前 |
 Alexander Timofeev
|
d224ecc383
[AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.
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6 年之前 |
 Peter Collingbourne
|
d7a83f9517
Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence."
|
6 年之前 |
|
Alexander Timofeev
|
6a29119c95
[AMDGPU] Divergence driven ISel. Assign register class for cross block values according to the divergence.
|
6 年之前 |
 Tim Northover
|
14ed588ce0
CodeGen: factor out swifterror value tracking.
|
6 年之前 |
 Petar Jovanovic
|
0ddfb52ad6
[DebugInfoMetadata] Refactor DIExpression::prepend constants (NFC)
|
6 年之前 |
 Simon Pilgrim
|
339850574d
SelectionDAGISel::CodeGenAndEmitDAG - remove unused variable. NFCI.
|
6 年之前 |
 Serguei Katkov
|
46e8fd7ad7
[FastISel] Fix the crash in gc.result lowering
|
6 年之前 |
 Craig Topper
|
7f415404f7
Recommit r355224 "[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary."
|
6 年之前 |
|
Craig Topper
|
ac1eef5551
Revert r355224 "[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary."
|
6 年之前 |
|
Craig Topper
|
a3fccdcc5d
[TableGen][SelectionDAG][X86] Add specific isel matchers for immAllZerosV/immAllOnesV. Remove bitcasts from X86 patterns that are no longer necessary.
|
6 年之前 |
|
Craig Topper
|
82bff05bd6
[SelectionDAG] Add a OPC_CheckChild2CondCode to SelectionDAGISel to remove a MoveChild and MoveParent pair.
|
6 年之前 |
 Jeremy Morse
|
826e231bb6
[DebugInfo][DAG] Either salvage dangling debug info or emit Undef DBG_VALUEs
|
6 年之前 |
|
Craig Topper
|
e3696113b6
Implementation of asm-goto support in LLVM
|
6 年之前 |
 James Y Knight
|
4922a5538e
Fix emission of _fltused for MSVC.
|
6 年之前 |
 Chandler Carruth
|
6b547686c5
Update the file headers across all of the LLVM projects in the monorepo
|
6 年之前 |
|
Simon Pilgrim
|
ad5be70b1a
[SelectionDAG] Always use the version of computeKnownBits that returns a value. NFCI.
|
6 年之前 |
 Nicolai Haehnle
|
98272e49b8
TableGen/ISel: Allow PatFrag predicate code to access captured operands
|
6 年之前 |
|
Craig Topper
|
5018f6ea8f
[SelectionDAG] Compute known bits and num sign bits for live out vector registers. Use it to add AssertZExt/AssertSExt in the live in basic blocks
|
6 年之前 |
 Serge Guelton
|
bbe5fdb08d
Type safe version of MachinePassRegistry
|
6 年之前 |
|
Craig Topper
|
b52849d771
[SelectionDAGISel] Suppress a -Wunused-but-set-variable warning in release builds. NFC
|
6 年之前 |
