Roman Lebedev
|
4b3a651108
[DAGCombine][ARM][X86] (sub Carry, X) -> (addcarry (sub 0, X), 0, Carry) fold
|
6 years ago |
Philip Reames
|
11df0bc741
[SDAG] Update generic code to conservatively check for isAtomic in addition to isVolatile
|
6 years ago |
Craig Topper
|
9b2725ea53
[DAGCombiner][X86] Pass the CmpOpVT to reduceSelectOfFPConstantLoads so X86 can exclude fp128 compares.
|
6 years ago |
Simon Pilgrim
|
22f2f6974c
[DAGCombine] visitFDIV - Use isCheaperToUseNegatedFPOps helper for (fdiv (fneg X), (fneg Y)) -> (fdiv X, Y). NFCI.
|
6 years ago |
Qiu Chaofan
|
0c4c55c8ff
[DAGCombiner] Improve division estimation of floating points.
|
6 years ago |
Craig Topper
|
7d4736f09a
[SelectionDAG] Remove ISD::FP_ROUND_INREG
|
6 years ago |
Craig Topper
|
efb11053fc
[DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0 and no carry.
|
6 years ago |
Bjorn Pettersson
|
2d0b4264f3
[Intrinsic] Add the llvm.umul.fix.sat intrinsic
|
6 years ago |
Sanjay Patel
|
1324c4c450
[DAGCombiner] try to form test+set out of shift+mask patterns
|
6 years ago |
Sanjay Patel
|
ff59b5d0fd
[DAGCombiner] improve throughput of shift+logic+shift
|
6 years ago |
Sanjay Patel
|
bc57a818fb
[DAGCombiner] clean up code in visitShiftByConstant()
|
6 years ago |
Amaury Sechet
|
b5856059ce
[DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate.
|
6 years ago |
James Molloy
|
8c987dadef
[DAGCombiner] Don't create illegal narrow stores
|
6 years ago |
Simon Pilgrim
|
a3c7b088bb
[DAGCombine] ReduceLoadWidth - remove duplicate SDLoc. NFCI.
|
6 years ago |
Simon Pilgrim
|
cdceebe6b6
[DAGCombine] visitVSELECT - remove equivalent getValueType() call. NFCI.
|
6 years ago |
Simon Pilgrim
|
c097c0d34e
[DAGCombine] visitVSELECT - remove duplicate getOperand calls. NFCI.
|
6 years ago |
Simon Pilgrim
|
12b3d43360
[DAGCombine] visitVSELECT - use getShiftAmountTy for shift amounts.
|
6 years ago |
Simon Pilgrim
|
6bd86e8143
[DAGCombine] visitMULHS - use getScalarValueSizeInBits() to make safe for vector types.
|
6 years ago |
Simon Pilgrim
|
c5c6111933
[DAGCombine] visitMULHS/visitMULHU - isBuildVectorAllZeros doesn't mean node is all zeros
|
6 years ago |
Simon Pilgrim
|
e9ad855768
[DAGCombine] Fix shadow variable warnings. NFCI.
|
6 years ago |
Simon Pilgrim
|
b915666de3
Fix signed/unsigned comparison warning. NFCI.
|
6 years ago |
Amaury Sechet
|
ae86cd45ea
[DAGCombiner] (insert_vector_elt (vector_shuffle X, Y), (extract_vector_elt X, N), IdxC) -> (vector_shuffle X, Y)
|
6 years ago |
Simon Pilgrim
|
4cac6dfafe
[DAGCombine] Fix cppcheck shadow variable warning. NFCI.
|
6 years ago |
Amaury Sechet
|
77ff67796a
[TargetLowering] Add buildLegalVectorShuffle facility to help build legal shuffles
|
6 years ago |
Simon Pilgrim
|
61fe24c0fc
[DAGCombine] Remove LoadedSlice::Cost default 'ForCodeSize' constructor arguments. NFCI.
|
6 years ago |
Sanjay Patel
|
9c26d11c10
[DAGCombiner] cancel fnegs from multiplied operands of FMA
|
6 years ago |
Amaury Sechet
|
a0fe2f4551
[DAGCombiner] Add node to the worklist in topological order in parallelizeChainedStores
|
6 years ago |
Amaury Sechet
|
4d6de2d328
[DAGCombiner] Add node to the worklist in topological order after relegalization.
|
6 years ago |
Richard Trieu
|
6416952f01
Revert r369927 - [DAGCombiner] Remove a bunch of redundant AddToWorklist calls.
|
6 years ago |
Craig Topper
|
0812c5535f
[DAGCombiner][X86] Teach SimplifyVBinOp to fold VBinOp (concat X, undef/constant), (concat Y, undef/constant) -> concat (VBinOp X, Y), VecC
|
6 years ago |