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[MC] Move the instruction latency computation from TargetSchedModel to MCSchedModel.

The goal is to make the latency information accessible through the MCSchedModel
interface. This is particularly important for tools like llvm-mca that only have
access to the MCSchedModel API.

This partially fixes PR36676.
No functional change intended.

Differential Revision: https://reviews.llvm.org/D44383


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327406 91177308-0d34-0410-b5e6-96231b3b80d8
Andrea Di Biagio 7 年之前
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fe3b1d2687
共有 3 個文件被更改,包括 23 次插入9 次删除
  1. 5 0
      include/llvm/MC/MCSchedule.h
  2. 1 9
      lib/CodeGen/TargetSchedule.cpp
  3. 17 0
      lib/MC/MCSchedule.cpp

+ 5 - 0
include/llvm/MC/MCSchedule.h

@@ -21,6 +21,7 @@
 namespace llvm {
 
 struct InstrItinerary;
+class MCSubtargetInfo;
 
 /// Define a kind of processor resource that will be modeled by the scheduler.
 struct MCProcResourceDesc {
@@ -226,6 +227,10 @@ struct MCSchedModel {
     return &SchedClassTable[SchedClassIdx];
   }
 
+  /// Returns the latency value for the scheduling class.
+  static int computeInstrLatency(const MCSubtargetInfo &STI,
+                                 const MCSchedClassDesc &SCDesc);
+
   /// Returns the default initialized model.
   static const MCSchedModel &GetDefaultSchedModel() { return Default; }
   static const MCSchedModel Default;

+ 1 - 9
lib/CodeGen/TargetSchedule.cpp

@@ -257,15 +257,7 @@ unsigned TargetSchedModel::computeOperandLatency(
 
 unsigned
 TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const {
-  unsigned Latency = 0;
-  for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries;
-       DefIdx != DefEnd; ++DefIdx) {
-    // Lookup the definition's write latency in SubtargetInfo.
-    const MCWriteLatencyEntry *WLEntry =
-      STI->getWriteLatencyEntry(&SCDesc, DefIdx);
-    Latency = std::max(Latency, capLatency(WLEntry->Cycles));
-  }
-  return Latency;
+  return capLatency(MCSchedModel::computeInstrLatency(*STI, SCDesc));
 }
 
 unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const {

+ 17 - 0
lib/MC/MCSchedule.cpp

@@ -12,6 +12,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/MC/MCSchedule.h"
+#include "llvm/MC/MCSubtargetInfo.h"
 #include <type_traits>
 
 using namespace llvm;
@@ -32,3 +33,19 @@ const MCSchedModel MCSchedModel::Default = {DefaultIssueWidth,
                                             0,
                                             0,
                                             nullptr};
+
+int MCSchedModel::computeInstrLatency(const MCSubtargetInfo &STI,
+                                      const MCSchedClassDesc &SCDesc) {
+  int Latency = 0;
+  for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries;
+       DefIdx != DefEnd; ++DefIdx) {
+    // Lookup the definition's write latency in SubtargetInfo.
+    const MCWriteLatencyEntry *WLEntry =
+        STI.getWriteLatencyEntry(&SCDesc, DefIdx);
+    // Early exit if we found an invalid latency.
+    if (WLEntry->Cycles < 0)
+      return WLEntry->Cycles;
+    Latency = std::max(Latency, static_cast<int>(WLEntry->Cycles));
+  }
+  return Latency;
+}