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@@ -986,24 +986,11 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
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break;
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break;
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case TargetOpcode::G_LOAD:
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case TargetOpcode::G_LOAD:
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case TargetOpcode::G_STORE:
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case TargetOpcode::G_STORE:
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- case TargetOpcode::G_ZEXTLOAD:
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- case TargetOpcode::G_SEXTLOAD:
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// Generic loads and stores must have a single MachineMemOperand
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// Generic loads and stores must have a single MachineMemOperand
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// describing that access.
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// describing that access.
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- if (!MI->hasOneMemOperand()) {
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+ if (!MI->hasOneMemOperand())
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report("Generic instruction accessing memory must have one mem operand",
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report("Generic instruction accessing memory must have one mem operand",
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MI);
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MI);
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- } else {
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- if (MI->getOpcode() == TargetOpcode::G_ZEXTLOAD ||
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- MI->getOpcode() == TargetOpcode::G_SEXTLOAD) {
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- const MachineMemOperand &MMO = **MI->memoperands_begin();
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- LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
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- if (MMO.getSize() * 8 >= DstTy.getSizeInBits()) {
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- report("Generic extload must have a narrower memory type", MI);
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- }
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- }
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- }
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-
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break;
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break;
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case TargetOpcode::G_PHI: {
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case TargetOpcode::G_PHI: {
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LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
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LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
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