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@@ -151,7 +151,7 @@ def : WriteRes<WriteFLoad, [SKXPort23]> { let Latency = 5; }
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def : WriteRes<WriteFStore, [SKXPort237, SKXPort4]>;
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def : WriteRes<WriteFMove, [SKXPort015]>;
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-defm : SKXWriteResPair<WriteFAdd, [SKXPort1], 3>; // Floating point add/sub.
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+defm : SKXWriteResPair<WriteFAdd, [SKXPort015], 4, [1], 1, 6>; // Floating point add/sub.
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defm : SKXWriteResPair<WriteFCmp, [SKXPort015], 4, [1], 1, 6>; // Floating point compare.
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defm : SKXWriteResPair<WriteFCom, [SKXPort0], 2>; // Floating point compare to flags.
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defm : SKXWriteResPair<WriteFMul, [SKXPort015], 4, [1], 1, 6>; // Floating point multiplication.
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@@ -1238,7 +1238,8 @@ def SKXWriteResGroup31 : SchedWriteRes<[SKXPort1]> {
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let NumMicroOps = 1;
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let ResourceCycles = [1];
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}
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-def: InstRW<[SKXWriteResGroup31], (instregex "PDEP(32|64)rr",
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+def: InstRW<[SKXWriteResGroup31], (instregex "CMOV(N?)(B|BE|E|P)_F",
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+ "PDEP(32|64)rr",
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"PEXT(32|64)rr",
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"SHLD(16|32|64)rri8",
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"SHRD(16|32|64)rri8")>;
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@@ -1603,13 +1604,7 @@ def SKXWriteResGroup50 : SchedWriteRes<[SKXPort015]> {
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let NumMicroOps = 1;
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let ResourceCycles = [1];
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}
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-def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
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- "ADDPSrr",
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- "ADDSDrr",
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- "ADDSSrr",
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- "ADDSUBPDrr",
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- "ADDSUBPSrr",
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- "CVTDQ2PSrr",
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+def: InstRW<[SKXWriteResGroup50], (instregex "CVTDQ2PSrr",
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"CVTPS2DQrr",
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"CVTTPS2DQrr",
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"PMADDUBSWrr",
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@@ -1620,28 +1615,6 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
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"PMULHWrr",
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"PMULLWrr",
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"PMULUDQrr",
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- "SUBPDrr",
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- "SUBPSrr",
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- "SUBSDrr",
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- "SUBSSrr",
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- "VADDPDYrr",
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- "VADDPDZ128rr",
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- "VADDPDZ256rr",
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- "VADDPDZrr",
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- "VADDPDrr",
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- "VADDPSYrr",
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- "VADDPSZ128rr",
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- "VADDPSZ256rr",
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- "VADDPSZrr",
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- "VADDPSrr",
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- "VADDSDZrr",
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- "VADDSDrr",
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- "VADDSSZrr",
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- "VADDSSrr",
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- "VADDSUBPDYrr",
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- "VADDSUBPDrr",
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- "VADDSUBPSYrr",
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- "VADDSUBPSrr",
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"VCVTDQ2PSYrr",
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"VCVTDQ2PSZ128rr",
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"VCVTDQ2PSZ256rr",
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@@ -1684,30 +1657,6 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
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"VCVTUQQ2PDZ128rr",
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"VCVTUQQ2PDZ256rr",
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"VCVTUQQ2PDZrr",
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- "VFIXUPIMMPDZ128rri",
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- "VFIXUPIMMPDZ256rri",
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- "VFIXUPIMMPDZrri",
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- "VFIXUPIMMPSZ128rri",
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- "VFIXUPIMMPSZ256rri",
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- "VFIXUPIMMPSZrri",
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- "VFIXUPIMMSDrri",
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- "VFIXUPIMMSSrri",
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- "VGETEXPPDZ128r",
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- "VGETEXPPDZ256r",
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- "VGETEXPPDr",
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- "VGETEXPPSZ128r",
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- "VGETEXPPSZ256r",
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- "VGETEXPPSr",
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- "VGETEXPSDr",
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- "VGETEXPSSr",
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- "VGETMANTPDZ128rri",
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- "VGETMANTPDZ256rri",
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- "VGETMANTPDZrri",
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- "VGETMANTPSZ128rri",
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- "VGETMANTPSZ256rri",
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- "VGETMANTPSZrri",
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- "VGETMANTSDZ128rri",
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- "VGETMANTSSZ128rri",
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"VPLZCNTDZ128rr",
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"VPLZCNTDZ256rr",
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"VPLZCNTDZrr",
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@@ -1753,45 +1702,7 @@ def: InstRW<[SKXWriteResGroup50], (instregex "ADDPDrr",
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"VPMULUDQZ128rr",
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"VPMULUDQZ256rr",
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"VPMULUDQZrr",
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- "VPMULUDQrr",
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- "VRANGEPDZ128rri",
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- "VRANGEPDZ256rri",
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- "VRANGEPDZrri",
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- "VRANGEPSZ128rri",
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- "VRANGEPSZ256rri",
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- "VRANGEPSZrri",
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- "VRANGESDZ128rri",
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- "VRANGESSZ128rri",
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- "VREDUCEPDZ128rri",
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- "VREDUCEPDZ256rri",
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- "VREDUCEPDZrri",
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- "VREDUCEPSZ128rri",
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- "VREDUCEPSZ256rri",
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- "VREDUCEPSZrri",
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- "VREDUCESDZ128rri",
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- "VREDUCESSZ128rri",
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- "VSCALEFPDZ128rr",
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- "VSCALEFPDZ256rr",
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- "VSCALEFPDZrr",
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- "VSCALEFPSZ128rr",
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- "VSCALEFPSZ256rr",
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- "VSCALEFPSZrr",
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- "VSCALEFSDZ128rr",
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- "VSCALEFSSZ128rr",
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- "VSUBPDYrr",
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- "VSUBPDZ128rr",
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- "VSUBPDZ256rr",
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- "VSUBPDZrr",
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- "VSUBPDrr",
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- "VSUBPSYrr",
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- "VSUBPSZ128rr",
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- "VSUBPSZ256rr",
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- "VSUBPSZrr",
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- "VSUBPSrr",
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- "VSUBSDZrr",
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- "VSUBSDrr",
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- "VSUBSSZrr",
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- "VSUBSSrr")>;
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+ "VPMULUDQrr")>;
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def SKXWriteResGroup51 : SchedWriteRes<[SKXPort5]> {
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let Latency = 4;
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@@ -3864,11 +3775,7 @@ def: InstRW<[SKXWriteResGroup149],
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"VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)Z128m(b?)",
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"VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)m",
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"VF(N)?M(ADD|SUB)(132|213|231)S(D|S)Zm")>;
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-def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
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- "ADDPSrm",
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- "ADDSUBPDrm",
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- "ADDSUBPSrm",
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- "CVTDQ2PSrm",
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+def: InstRW<[SKXWriteResGroup149], (instregex "CVTDQ2PSrm",
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"CVTPS2DQrm",
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"CVTSS2SDrm",
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"CVTTPS2DQrm",
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@@ -3880,16 +3787,6 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
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"PMULHWrm",
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"PMULLWrm",
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"PMULUDQrm",
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- "SUBPDrm",
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- "SUBPSrm",
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- "VADDPDZ128rm(b?)",
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- "VADDPDrm",
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- "VADDPSZ128rm(b?)",
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- "VADDPSrm",
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- "VADDSDZrm",
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- "VADDSSZrm",
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- "VADDSUBPDrm",
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- "VADDSUBPSrm",
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"VCVTDQ2PDZ128rm(b?)",
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"VCVTDQ2PSZ128rm(b?)",
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"VCVTDQ2PSrm",
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@@ -3918,18 +3815,6 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
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"VCVTUDQ2PSZ128rm(b?)",
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"VCVTUQQ2PDZ128rm(b?)",
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"VCVTUQQ2PSZ128rm(b?)",
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- "VFIXUPIMMPDZ128rm(b?)i",
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- "VFIXUPIMMPSZ128rm(b?)i",
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- "VFIXUPIMMSDrmi(b?)",
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- "VFIXUPIMMSSrmi(b?)",
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- "VGETEXPPDZ128m(b?)",
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- "VGETEXPPSZ128m(b?)",
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- "VGETEXPSDm(b?)",
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- "VGETEXPSSm(b?)",
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- "VGETMANTPDZ128rm(b?)i",
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- "VGETMANTPSZ128rm(b?)i",
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- "VGETMANTSDZ128rmi(b?)",
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- "VGETMANTSSZ128rmi(b?)",
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"VPLZCNTDZ128rm(b?)",
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"VPLZCNTQZ128rm(b?)",
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"VPMADDUBSWZ128rm(b?)",
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@@ -3947,25 +3832,7 @@ def: InstRW<[SKXWriteResGroup149], (instregex "ADDPDrm",
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"VPMULLWZ128rm(b?)",
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"VPMULLWrm",
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"VPMULUDQZ128rm(b?)",
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- "VPMULUDQrm",
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- "VRANGEPDZ128rm(b?)i",
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- "VRANGEPSZ128rm(b?)i",
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- "VRANGESDZ128rmi(b?)",
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- "VRANGESSZ128rmi(b?)",
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- "VREDUCEPDZ128rm(b?)i",
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- "VREDUCEPSZ128rm(b?)i",
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- "VREDUCESDZ128rmi(b?)",
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- "VREDUCESSZ128rmi(b?)",
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- "VSCALEFPDZ128rm(b?)",
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- "VSCALEFPSZ128rm(b?)",
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- "VSCALEFSDZ128rm(b?)",
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- "VSCALEFSSZ128rm(b?)",
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- "VSUBPDZ128rm(b?)",
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- "VSUBPDrm",
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- "VSUBPSZ128rm(b?)",
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- "VSUBPSrm",
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- "VSUBSDZrm",
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- "VSUBSSZrm")>;
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+ "VPMULUDQrm")>;
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def SKXWriteResGroup151 : SchedWriteRes<[SKXPort5,SKXPort23]> {
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let Latency = 10;
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Simon Pilgrim