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@@ -84,7 +84,7 @@ namespace {
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bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB);
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bool isPhysDefTriviallyDead(unsigned Reg,
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MachineBasicBlock::const_iterator I,
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- MachineBasicBlock::const_iterator E) const ;
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+ MachineBasicBlock::const_iterator E) const;
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bool hasLivePhysRegDefUses(const MachineInstr *MI,
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const MachineBasicBlock *MBB,
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SmallSet<unsigned,8> &PhysRefs,
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@@ -100,8 +100,7 @@ namespace {
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void ExitScope(MachineBasicBlock *MBB);
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bool ProcessBlock(MachineBasicBlock *MBB);
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void ExitScopeIfDone(MachineDomTreeNode *Node,
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- DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
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- DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &ParentMap);
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+ DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren);
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bool PerformCSE(MachineDomTreeNode *Node);
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};
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} // end anonymous namespace
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@@ -436,7 +435,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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// used, then it's not safe to replace it with a common subexpression.
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// It's also not safe if the instruction uses physical registers.
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bool CrossMBBPhysDef = false;
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- SmallSet<unsigned,8> PhysRefs;
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+ SmallSet<unsigned, 8> PhysRefs;
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SmallVector<unsigned, 2> PhysDefs;
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if (FoundCSE && hasLivePhysRegDefUses(MI, MBB, PhysRefs, PhysDefs)) {
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FoundCSE = false;
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@@ -479,6 +478,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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"Do not CSE physical register defs!");
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if (!isProfitableToCSE(NewReg, OldReg, CSMI, MI)) {
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+ DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
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DoCSE = false;
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break;
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}
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@@ -487,6 +487,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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// within the register class of the new instruction.
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const TargetRegisterClass *OldRC = MRI->getRegClass(OldReg);
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if (!MRI->constrainRegClass(NewReg, OldRC)) {
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+ DEBUG(dbgs() << "*** Not the same register class, avoid CSE!\n");
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DoCSE = false;
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break;
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}
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@@ -521,7 +522,6 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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++NumCommutes;
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Changed = true;
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} else {
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- DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
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VNT.insert(MI, CurrVN++);
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Exps.push_back(MI);
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}
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@@ -536,8 +536,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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/// up the dominator tree to destroy ancestors which are now done.
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void
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MachineCSE::ExitScopeIfDone(MachineDomTreeNode *Node,
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- DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren,
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- DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> &ParentMap) {
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+ DenseMap<MachineDomTreeNode*, unsigned> &OpenChildren) {
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if (OpenChildren[Node])
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return;
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@@ -545,7 +544,7 @@ MachineCSE::ExitScopeIfDone(MachineDomTreeNode *Node,
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ExitScope(Node->getBlock());
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// Now traverse upwards to pop ancestors whose offsprings are all done.
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- while (MachineDomTreeNode *Parent = ParentMap[Node]) {
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+ while (MachineDomTreeNode *Parent = Node->getIDom()) {
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unsigned Left = --OpenChildren[Parent];
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if (Left != 0)
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break;
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@@ -557,7 +556,6 @@ MachineCSE::ExitScopeIfDone(MachineDomTreeNode *Node,
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bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
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SmallVector<MachineDomTreeNode*, 32> Scopes;
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SmallVector<MachineDomTreeNode*, 8> WorkList;
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- DenseMap<MachineDomTreeNode*, MachineDomTreeNode*> ParentMap;
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DenseMap<MachineDomTreeNode*, unsigned> OpenChildren;
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CurrVN = 0;
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@@ -572,7 +570,6 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
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OpenChildren[Node] = NumChildren;
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for (unsigned i = 0; i != NumChildren; ++i) {
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MachineDomTreeNode *Child = Children[i];
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- ParentMap[Child] = Node;
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WorkList.push_back(Child);
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}
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} while (!WorkList.empty());
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@@ -585,7 +582,7 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
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EnterScope(MBB);
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Changed |= ProcessBlock(MBB);
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// If it's a leaf node, it's done. Traverse upwards to pop ancestors.
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- ExitScopeIfDone(Node, OpenChildren, ParentMap);
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+ ExitScopeIfDone(Node, OpenChildren);
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}
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return Changed;
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