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@@ -124,3 +124,152 @@ latchexit: ; preds = %latch
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exitsucc: ; preds = %headerexit
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ret i64 96
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}
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+
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+; exit block (%default) has an exiting block and another exit block as predecessors.
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+define void @test4(i16 %c3) {
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+; CHECK-LABEL: test4
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+
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+; CHECK-LABEL: exiting.prol:
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+; CHECK-NEXT: switch i16 %c3, label %default.loopexit.loopexit1 [
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+
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+; CHECK-LABEL: exiting:
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+; CHECK-NEXT: switch i16 %c3, label %default.loopexit.loopexit [
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+
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+; CHECK-LABEL: default.loopexit.loopexit:
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+; CHECK-NEXT: br label %default.loopexit
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+
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+; CHECK-LABEL: default.loopexit.loopexit1:
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+; CHECK-NEXT: br label %default.loopexit
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+
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+; CHECK-LABEL: default.loopexit:
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+; CHECK-NEXT: br label %default
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+preheader:
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+ %c1 = zext i32 undef to i64
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+ br label %header
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+
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+header: ; preds = %latch, %preheader
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+ %indvars.iv = phi i64 [ 0, %preheader ], [ %indvars.iv.next, %latch ]
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+ br label %exiting
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+
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+exiting: ; preds = %header
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+ switch i16 %c3, label %default [
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+ i16 45, label %otherexit
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+ i16 95, label %latch
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+ ]
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+
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+latch: ; preds = %exiting
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+ %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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+ %c2 = icmp ult i64 %indvars.iv.next, %c1
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+ br i1 %c2, label %header, label %latchexit
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+
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+latchexit: ; preds = %latch
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+ ret void
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+
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+default: ; preds = %otherexit, %exiting
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+ ret void
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+
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+otherexit: ; preds = %exiting
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+ br label %default
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+}
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+
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+; exit block (%exitB) has an exiting block and another exit block as predecessors.
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+; exiting block comes from inner loop.
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+define void @test5() {
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+; CHECK-LABEL: test5
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+; CHECK-LABEL: bb1:
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+; CHECK-NEXT: br i1 false, label %outerH.prol.preheader, label %outerH.prol.loopexit
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+
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+; CHECK-LABEL: outerH.prol.preheader:
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+; CHECK-NEXT: br label %outerH.prol
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+
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+; CHECK-LABEL: outerH.prol:
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+; CHECK-NEXT: %tmp4.prol = phi i32 [ %tmp6.prol, %outerLatch.prol ], [ undef, %outerH.prol.preheader ]
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+; CHECK-NEXT: %prol.iter = phi i32 [ 0, %outerH.prol.preheader ], [ %prol.iter.sub, %outerLatch.prol ]
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+; CHECK-NEXT: br label %innerH.prol
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+bb:
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+ %tmp = icmp sgt i32 undef, 79
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+ br i1 %tmp, label %outerLatchExit, label %bb1
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+
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+bb1: ; preds = %bb
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+ br label %outerH
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+
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+outerH: ; preds = %outerLatch, %bb1
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+ %tmp4 = phi i32 [ %tmp6, %outerLatch ], [ undef, %bb1 ]
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+ br label %innerH
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+
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+innerH: ; preds = %innerLatch, %outerH
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+ br i1 undef, label %innerexiting, label %otherexitB
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+
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+innerexiting: ; preds = %innerH
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+ br i1 undef, label %innerLatch, label %exitB
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+
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+innerLatch: ; preds = %innerexiting
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+ %tmp13 = fcmp olt double undef, 2.000000e+00
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+ br i1 %tmp13, label %innerH, label %outerLatch
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+
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+outerLatch: ; preds = %innerLatch
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+ %tmp6 = add i32 %tmp4, 1
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+ %tmp7 = icmp sgt i32 %tmp6, 79
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+ br i1 %tmp7, label %outerLatchExit, label %outerH
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+
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+outerLatchExit: ; preds = %outerLatch, %bb
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+ ret void
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+
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+exitB: ; preds = %innerexiting, %otherexitB
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+ ret void
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+
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+otherexitB: ; preds = %innerH
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+ br label %exitB
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+
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+}
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+
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+; Blocks reachable from exits (not_zero44) have the IDom as the block within the loop (Header).
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+; Update the IDom to the preheader.
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+define void @test6() {
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+; CHECK-LABEL: test6
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+; CHECK-LABEL: header.prol.preheader:
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+; CHECK-NEXT: br label %header.prol
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+
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+; CHECK-LABEL: header.prol:
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+; CHECK-NEXT: %indvars.iv.prol = phi i64 [ undef, %header.prol.preheader ], [ %indvars.iv.next.prol, %latch.prol ]
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+; CHECK-NEXT: %prol.iter = phi i64 [ 1, %header.prol.preheader ], [ %prol.iter.sub, %latch.prol ]
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+; CHECK-NEXT: br i1 false, label %latch.prol, label %otherexit.loopexit1
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+
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+; CHECK-LABEL: header.prol.loopexit.unr-lcssa:
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+; CHECK-NEXT: %indvars.iv.unr.ph = phi i64 [ %indvars.iv.next.prol, %latch.prol ]
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+; CHECK-NEXT: br label %header.prol.loopexit
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+
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+; CHECK-LABEL: header.prol.loopexit:
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+; CHECK-NEXT: %indvars.iv.unr = phi i64 [ undef, %entry ], [ %indvars.iv.unr.ph, %header.prol.loopexit.unr-lcssa ]
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+; CHECK-NEXT: br i1 true, label %latchexit, label %entry.new
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+
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+; CHECK-LABEL: entry.new:
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+; CHECK-NEXT: br label %header
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+entry:
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+ br label %header
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+
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+header: ; preds = %latch, %entry
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+ %indvars.iv = phi i64 [ undef, %entry ], [ %indvars.iv.next, %latch ]
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+ br i1 undef, label %latch, label %otherexit
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+
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+latch: ; preds = %header
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+ %indvars.iv.next = add nsw i64 %indvars.iv, 2
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+ %0 = icmp slt i64 %indvars.iv.next, 616
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+ br i1 %0, label %header, label %latchexit
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+
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+latchexit: ; preds = %latch
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+ br label %latchexitsucc
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+
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+otherexit: ; preds = %header
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+ br label %otherexitsucc
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+
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+otherexitsucc: ; preds = %otherexit
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+ br label %not_zero44
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+
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+not_zero44: ; preds = %latchexitsucc, %otherexitsucc
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+ unreachable
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+
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+latchexitsucc: ; preds = %latchexit
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+ br label %not_zero44
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+}
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+
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