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@@ -1,6 +1,22 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=avx -S < %s | FileCheck %s --check-prefixes=ALL,AVX
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; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=avx2 -S < %s | FileCheck %s --check-prefixes=ALL,AVX2
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+; RUN: opt -codegenprepare -mtriple=x86_64-- -mattr=avx -S -enable-debugify < %s 2>&1 | FileCheck %s -check-prefix=DEBUG
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+
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+define <4 x i32> @vector_variable_shift_right(<4 x i1> %cond, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
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+; ALL-LABEL: @vector_variable_shift_right(
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+; ALL-NEXT: [[SPLAT1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
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+; ALL-NEXT: [[SPLAT2:%.*]] = shufflevector <4 x i32> [[Y:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
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+; ALL-NEXT: [[SEL:%.*]] = select <4 x i1> [[COND:%.*]], <4 x i32> [[SPLAT1]], <4 x i32> [[SPLAT2]]
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+; ALL-NEXT: [[SH:%.*]] = lshr <4 x i32> [[Z:%.*]], [[SEL]]
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+; ALL-NEXT: ret <4 x i32> [[SH]]
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+;
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+ %splat1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
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+ %splat2 = shufflevector <4 x i32> %y, <4 x i32> undef, <4 x i32> zeroinitializer
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+ %sel = select <4 x i1> %cond, <4 x i32> %splat1, <4 x i32> %splat2
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+ %sh = lshr <4 x i32> %z, %sel
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+ ret <4 x i32> %sh
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+}
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; PR37428 - https://bugs.llvm.org/show_bug.cgi?id=37428
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@@ -101,17 +117,5 @@ exit:
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ret void
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}
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-define <4 x i32> @vector_variable_shift_right(<4 x i1> %cond, <4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
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-; ALL-LABEL: @vector_variable_shift_right(
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-; ALL-NEXT: [[SPLAT1:%.*]] = shufflevector <4 x i32> [[X:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
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-; ALL-NEXT: [[SPLAT2:%.*]] = shufflevector <4 x i32> [[Y:%.*]], <4 x i32> undef, <4 x i32> zeroinitializer
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-; ALL-NEXT: [[SEL:%.*]] = select <4 x i1> [[COND:%.*]], <4 x i32> [[SPLAT1]], <4 x i32> [[SPLAT2]]
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-; ALL-NEXT: [[SH:%.*]] = lshr <4 x i32> [[Z:%.*]], [[SEL]]
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-; ALL-NEXT: ret <4 x i32> [[SH]]
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-;
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- %splat1 = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> zeroinitializer
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- %splat2 = shufflevector <4 x i32> %y, <4 x i32> undef, <4 x i32> zeroinitializer
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- %sel = select <4 x i1> %cond, <4 x i32> %splat1, <4 x i32> %splat2
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- %sh = lshr <4 x i32> %z, %sel
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- ret <4 x i32> %sh
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-}
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+; Check that every instruction inserted by -codegenprepare has a debug location.
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+; DEBUG: CheckModuleDebugify: PASS
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