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@@ -16,111 +16,397 @@
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using namespace llvm;
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namespace {
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-static const unsigned kAArch64ArchExtKinds[] = {
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-#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) ID,
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-#include "llvm/Support/AArch64TargetParser.def"
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-#undef AARCH64_ARCH_EXT_NAME
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-};
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-
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-template <typename T> struct ArchNames {
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- const char *Name;
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- unsigned DefaultFPU;
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- unsigned ArchBaseExtensions;
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- T ID;
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- ARMBuildAttrs::CPUArch ArchAttr;
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-};
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-ArchNames<AArch64::ArchKind> kAArch64ARCHNames[] = {
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-#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
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- ARCH_BASE_EXT) \
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- {NAME, ARM::ARCH_FPU, ARCH_BASE_EXT, AArch64::ArchKind::ID, ARCH_ATTR},
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-#include "llvm/Support/AArch64TargetParser.def"
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-#undef AARCH64_ARCH
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-};
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-ArchNames<ARM::ArchKind> kARMARCHNames[] = {
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-#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
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- ARCH_BASE_EXT) \
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- {NAME, ARM::ARCH_FPU, ARCH_BASE_EXT, ARM::ID, ARCH_ATTR},
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-#include "llvm/Support/ARMTargetParser.def"
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-#undef ARM_ARCH
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-};
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-
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-template <typename T> struct CpuNames {
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- const char *Name;
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- T ID;
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- unsigned DefaultFPU;
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- unsigned DefaultExt;
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-};
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-CpuNames<AArch64::ArchKind> kAArch64CPUNames[] = {
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-#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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- {NAME, AArch64::ArchKind::ID, ARM::DEFAULT_FPU, DEFAULT_EXT},
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-#include "llvm/Support/AArch64TargetParser.def"
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-#undef AARCH64_CPU_NAME
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-};
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-CpuNames<ARM::ArchKind> kARMCPUNames[] = {
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-#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
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- {NAME, ARM::ID, ARM::DEFAULT_FPU, DEFAULT_EXT},
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-#include "llvm/Support/ARMTargetParser.def"
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-#undef ARM_CPU_NAME
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-};
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-
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const char *ARMArch[] = {
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- "armv2", "armv2a", "armv3", "armv3m", "armv4",
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- "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
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- "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
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- "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
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- "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
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- "armv7a", "armv7hl", "armv7l", "armv7-r", "armv7r",
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- "armv7-m", "armv7m", "armv7k", "armv7s", "armv7e-m",
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- "armv7em", "armv8-a", "armv8", "armv8a", "armv8.1-a",
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- "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-m.base", "armv8m.base",
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- "armv8-m.main", "armv8m.main", "iwmmxt", "iwmmxt2", "xscale"};
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-
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-template <typename T, size_t N>
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-bool contains(const T (&array)[N], const T element) {
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- return std::find(std::begin(array), std::end(array), element) !=
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- std::end(array);
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-}
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-
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-template <size_t N>
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-bool contains(const char *(&array)[N], const char *element) {
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- return std::find_if(std::begin(array), std::end(array), [&](const char *S) {
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- return ::strcmp(S, element) == 0;
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- }) != std::end(array);
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-}
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-
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-TEST(TargetParserTest, ARMArchName) {
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- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
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- AK <= ARM::ArchKind::AK_LAST;
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- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
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- EXPECT_TRUE(AK == ARM::AK_LAST ? ARM::getArchName(AK).empty()
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- : !ARM::getArchName(AK).empty());
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-}
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-
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-TEST(TargetParserTest, ARMCPUAttr) {
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- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
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- AK <= ARM::ArchKind::AK_LAST;
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- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
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- EXPECT_TRUE((AK == ARM::AK_INVALID || AK == ARM::AK_LAST)
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- ? ARM::getCPUAttr(AK).empty()
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- : !ARM::getCPUAttr(AK).empty());
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-}
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-
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-TEST(TargetParserTest, ARMSubArch) {
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- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
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- AK <= ARM::ArchKind::AK_LAST;
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- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
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- EXPECT_TRUE((AK == ARM::AK_INVALID || AK == ARM::AK_IWMMXT ||
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- AK == ARM::AK_IWMMXT2 || AK == ARM::AK_LAST)
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- ? ARM::getSubArch(AK).empty()
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- : !ARM::getSubArch(AK).empty());
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-}
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-
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-TEST(TargetParserTest, ARMFPUName) {
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- for (ARM::FPUKind FK = static_cast<ARM::FPUKind>(0);
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- FK <= ARM::FPUKind::FK_LAST;
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- FK = static_cast<ARM::FPUKind>(static_cast<unsigned>(FK) + 1))
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- EXPECT_TRUE(FK == ARM::FK_LAST ? ARM::getFPUName(FK).empty()
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- : !ARM::getFPUName(FK).empty());
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+ "armv2", "armv2a", "armv3", "armv3m", "armv4",
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+ "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
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+ "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
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+ "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
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+ "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
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+ "armv7a", "armv7hl", "armv7l", "armv7-r", "armv7r",
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+ "armv7-m", "armv7m", "armv7k", "armv7s", "armv7e-m",
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+ "armv7em", "armv8-a", "armv8", "armv8a", "armv8.1-a",
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+ "armv8.1a", "armv8.2-a", "armv8.2a", "armv8-r", "armv8r",
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+ "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt",
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+ "iwmmxt2", "xscale"};
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+
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+bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
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+ StringRef ExpectedFPU, unsigned ExpectedFlags,
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+ StringRef CPUAttr) {
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+ unsigned ArchKind = ARM::parseCPUArch(CPUName);
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+ bool pass = ARM::getArchName(ArchKind).equals(ExpectedArch);
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+ unsigned FPUKind = ARM::getDefaultFPU(CPUName, ArchKind);
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+ pass &= ARM::getFPUName(FPUKind).equals(ExpectedFPU);
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+
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+ unsigned ExtKind = ARM::getDefaultExtensions(CPUName, ArchKind);
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+ if (ExtKind > 1 && (ExtKind & ARM::AEK_NONE))
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+ pass &= ((ExtKind ^ ARM::AEK_NONE) == ExpectedFlags);
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+ else
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+ pass &= (ExtKind == ExpectedFlags);
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+
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+ pass &= ARM::getCPUAttr(ArchKind).equals(CPUAttr);
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+
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+ return pass;
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+}
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+
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+TEST(TargetParserTest, testARMCPU) {
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+ EXPECT_TRUE(testARMCPU("invalid", "invalid", "invalid",
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+ ARM::AEK_NONE, ""));
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+ EXPECT_TRUE(testARMCPU("generic", "invalid", "none",
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+ ARM::AEK_NONE, ""));
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+
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+ EXPECT_TRUE(testARMCPU("arm2", "armv2", "none",
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+ ARM::AEK_NONE, "2"));
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+ EXPECT_TRUE(testARMCPU("arm3", "armv2a", "none",
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+ ARM::AEK_NONE, "2A"));
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+ EXPECT_TRUE(testARMCPU("arm6", "armv3", "none",
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+ ARM::AEK_NONE, "3"));
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+ EXPECT_TRUE(testARMCPU("arm7m", "armv3m", "none",
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+ ARM::AEK_NONE, "3M"));
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+ EXPECT_TRUE(testARMCPU("arm8", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("arm810", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("strongarm", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("strongarm110", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("strongarm1100", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("strongarm1110", "armv4", "none",
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+ ARM::AEK_NONE, "4"));
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+ EXPECT_TRUE(testARMCPU("arm7tdmi", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm7tdmi-s", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm710t", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm720t", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm9", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm9tdmi", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm920", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm920t", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm922t", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm9312", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm940t", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("ep9312", "armv4t", "none",
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+ ARM::AEK_NONE, "4T"));
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+ EXPECT_TRUE(testARMCPU("arm10tdmi", "armv5t", "none",
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+ ARM::AEK_NONE, "5T"));
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+ EXPECT_TRUE(testARMCPU("arm1020t", "armv5t", "none",
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+ ARM::AEK_NONE, "5T"));
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+ EXPECT_TRUE(testARMCPU("arm9e", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm946e-s", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm966e-s", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm968e-s", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm10e", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm1020e", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm1022e", "armv5te", "none",
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+ ARM::AEK_DSP, "5TE"));
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+ EXPECT_TRUE(testARMCPU("arm926ej-s", "armv5tej", "none",
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+ ARM::AEK_DSP, "5TEJ"));
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+ EXPECT_TRUE(testARMCPU("arm1136j-s", "armv6", "none",
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+ ARM::AEK_DSP, "6"));
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+ EXPECT_TRUE(testARMCPU("arm1136jf-s", "armv6", "vfpv2",
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+ ARM::AEK_DSP, "6"));
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+ EXPECT_TRUE(testARMCPU("arm1136jz-s", "armv6", "none",
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+ ARM::AEK_DSP, "6"));
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+ EXPECT_TRUE(testARMCPU("arm1176j-s", "armv6k", "none",
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+ ARM::AEK_DSP, "6K"));
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+ EXPECT_TRUE(testARMCPU("arm1176jz-s", "armv6kz", "none",
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+ ARM::AEK_SEC | ARM::AEK_DSP, "6KZ"));
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+ EXPECT_TRUE(testARMCPU("mpcore", "armv6k", "vfpv2",
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+ ARM::AEK_DSP, "6K"));
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+ EXPECT_TRUE(testARMCPU("mpcorenovfp", "armv6k", "none",
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+ ARM::AEK_DSP, "6K"));
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+ EXPECT_TRUE(testARMCPU("arm1176jzf-s", "armv6kz", "vfpv2",
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+ ARM::AEK_SEC | ARM::AEK_DSP, "6KZ"));
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+ EXPECT_TRUE(testARMCPU("arm1156t2-s", "armv6t2", "none",
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+ ARM::AEK_DSP, "6T2"));
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+ EXPECT_TRUE(testARMCPU("arm1156t2f-s", "armv6t2", "vfpv2",
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+ ARM::AEK_DSP, "6T2"));
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+ EXPECT_TRUE(testARMCPU("cortex-m0", "armv6-m", "none",
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+ ARM::AEK_NONE, "6-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-m0plus", "armv6-m", "none",
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+ ARM::AEK_NONE, "6-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-m1", "armv6-m", "none",
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+ ARM::AEK_NONE, "6-M"));
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+ EXPECT_TRUE(testARMCPU("sc000", "armv6-m", "none",
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+ ARM::AEK_NONE, "6-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-a5", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_MP | ARM::AEK_SEC | ARM::AEK_DSP, "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a7", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_HWDIV | ARM::AEK_HWDIVARM | ARM::AEK_MP |
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+ ARM::AEK_SEC | ARM::AEK_VIRT | ARM::AEK_DSP,
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+ "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a8", "armv7-a", "neon",
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+ ARM::AEK_SEC | ARM::AEK_DSP, "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a9", "armv7-a", "neon-fp16",
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+ ARM::AEK_MP | ARM::AEK_SEC | ARM::AEK_DSP, "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a12", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
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+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
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+ "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a15", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
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+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
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+ "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-a17", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
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+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
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+ "7-A"));
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+ EXPECT_TRUE(testARMCPU("krait", "armv7-a", "neon-vfpv4",
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+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
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+ "7-A"));
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+ EXPECT_TRUE(testARMCPU("cortex-r4", "armv7-r", "none",
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+ ARM::AEK_HWDIV | ARM::AEK_DSP, "7-R"));
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+ EXPECT_TRUE(testARMCPU("cortex-r4f", "armv7-r", "vfpv3-d16",
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+ ARM::AEK_HWDIV | ARM::AEK_DSP, "7-R"));
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+ EXPECT_TRUE(testARMCPU("cortex-r5", "armv7-r", "vfpv3-d16",
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+ ARM::AEK_MP | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV |
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+ ARM::AEK_DSP, "7-R"));
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+ EXPECT_TRUE(testARMCPU("cortex-r7", "armv7-r", "vfpv3-d16-fp16",
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+ ARM::AEK_MP | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV |
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+ ARM::AEK_DSP, "7-R"));
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+ EXPECT_TRUE(testARMCPU("cortex-r8", "armv7-r", "vfpv3-d16-fp16",
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+ ARM::AEK_MP | ARM::AEK_HWDIVARM | ARM::AEK_HWDIV |
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+ ARM::AEK_DSP, "7-R"));
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+ EXPECT_TRUE(testARMCPU("cortex-r52", "armv8-r", "neon-fp-armv8",
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+ ARM::AEK_CRC | ARM::AEK_MP | ARM::AEK_VIRT |
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+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
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+ "8-R"));
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+ EXPECT_TRUE(testARMCPU("sc300", "armv7-m", "none",
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+ ARM::AEK_HWDIV, "7-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-m3", "armv7-m", "none",
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+ ARM::AEK_HWDIV, "7-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-m4", "armv7e-m", "fpv4-sp-d16",
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+ ARM::AEK_HWDIV | ARM::AEK_DSP, "7E-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-m7", "armv7e-m", "fpv5-d16",
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+ ARM::AEK_HWDIV | ARM::AEK_DSP, "7E-M"));
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+ EXPECT_TRUE(testARMCPU("cortex-a32", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cortex-a35", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cortex-a53", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cortex-a57", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cortex-a72", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cortex-a73", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("cyclone", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("exynos-m1", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("exynos-m2", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
|
|
|
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
|
|
|
+ ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "8-A"));
|
|
|
+ EXPECT_TRUE(testARMCPU("iwmmxt", "iwmmxt", "none",
|
|
|
+ ARM::AEK_NONE, "iwmmxt"));
|
|
|
+ EXPECT_TRUE(testARMCPU("xscale", "xscale", "none",
|
|
|
+ ARM::AEK_NONE, "xscale"));
|
|
|
+ EXPECT_TRUE(testARMCPU("swift", "armv7s", "neon-vfpv4",
|
|
|
+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIV | ARM::AEK_DSP,
|
|
|
+ "7-S"));
|
|
|
+}
|
|
|
+
|
|
|
+bool testARMArch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
|
|
|
+ unsigned ArchAttr) {
|
|
|
+ unsigned ArchKind = ARM::parseArch(Arch);
|
|
|
+ return (ArchKind != ARM::AK_INVALID) &
|
|
|
+ ARM::getDefaultCPU(Arch).equals(DefaultCPU) &
|
|
|
+ ARM::getSubArch(ArchKind).equals(SubArch) &
|
|
|
+ (ARM::getArchAttr(ArchKind) == ArchAttr);
|
|
|
+}
|
|
|
+
|
|
|
+TEST(TargetParserTest, testARMArch) {
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv2", "arm2", "v2",
|
|
|
+ ARMBuildAttrs::CPUArch::Pre_v4));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv2a", "arm3", "v2a",
|
|
|
+ ARMBuildAttrs::CPUArch::Pre_v4));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv3", "arm6", "v3",
|
|
|
+ ARMBuildAttrs::CPUArch::Pre_v4));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv3m", "arm7m", "v3m",
|
|
|
+ ARMBuildAttrs::CPUArch::Pre_v4));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv4", "strongarm", "v4",
|
|
|
+ ARMBuildAttrs::CPUArch::v4));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv4t", "arm7tdmi", "v4t",
|
|
|
+ ARMBuildAttrs::CPUArch::v4T));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv5t", "arm10tdmi", "v5",
|
|
|
+ ARMBuildAttrs::CPUArch::v5T));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv5te", "arm1022e", "v5e",
|
|
|
+ ARMBuildAttrs::CPUArch::v5TE));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv5tej", "arm926ej-s", "v5e",
|
|
|
+ ARMBuildAttrs::CPUArch::v5TEJ));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv6", "arm1136jf-s", "v6",
|
|
|
+ ARMBuildAttrs::CPUArch::v6));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv6k", "arm1176j-s", "v6k",
|
|
|
+ ARMBuildAttrs::CPUArch::v6K));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv6t2", "arm1156t2-s", "v6t2",
|
|
|
+ ARMBuildAttrs::CPUArch::v6T2));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv6kz", "arm1176jzf-s", "v6kz",
|
|
|
+ ARMBuildAttrs::CPUArch::v6KZ));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv6-m", "cortex-m0", "v6m",
|
|
|
+ ARMBuildAttrs::CPUArch::v6_M));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7-a", "cortex-a8", "v7",
|
|
|
+ ARMBuildAttrs::CPUArch::v7));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7-r", "cortex-r4", "v7r",
|
|
|
+ ARMBuildAttrs::CPUArch::v7));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7-m", "cortex-m3", "v7m",
|
|
|
+ ARMBuildAttrs::CPUArch::v7));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7e-m", "cortex-m4", "v7em",
|
|
|
+ ARMBuildAttrs::CPUArch::v7E_M));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8-a", "cortex-a53", "v8",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8.1-a", "generic", "v8.1a",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8.2-a", "generic", "v8.2a",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8-r", "cortex-r52", "v8r",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_R));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8-m.base", "generic", "v8m.base",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_M_Base));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv8-m.main", "generic", "v8m.main",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_M_Main));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("iwmmxt", "iwmmxt", "",
|
|
|
+ ARMBuildAttrs::CPUArch::v5TE));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("iwmmxt2", "generic", "",
|
|
|
+ ARMBuildAttrs::CPUArch::v5TE));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("xscale", "xscale", "v5e",
|
|
|
+ ARMBuildAttrs::CPUArch::v5TE));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7s", "swift", "v7s",
|
|
|
+ ARMBuildAttrs::CPUArch::v7));
|
|
|
+ EXPECT_TRUE(
|
|
|
+ testARMArch("armv7k", "generic", "v7k",
|
|
|
+ ARMBuildAttrs::CPUArch::v7));
|
|
|
+}
|
|
|
+
|
|
|
+bool testARMExtension(StringRef CPUName, unsigned ArchKind, StringRef ArchExt) {
|
|
|
+ return ARM::getDefaultExtensions(CPUName, ArchKind) &
|
|
|
+ ARM::parseArchExt(ArchExt);
|
|
|
+}
|
|
|
+
|
|
|
+TEST(TargetParserTest, testARMExtension) {
|
|
|
+ EXPECT_FALSE(testARMExtension("arm2", 0, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm3", 0, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm6", 0, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm7m", 0, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("strongarm", 0, "dsp"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm7tdmi", 0, "dsp"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm10tdmi", 0, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm1022e", 0, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm926ej-s", 0, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm1136jf-s", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm1176j-s", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm1156t2-s", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("arm1176jzf-s", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-m0", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-a8", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-r4", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-m3", 0, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-a53", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testARMExtension("cortex-r52", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testARMExtension("iwmmxt", 0, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("xscale", 0, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("swift", 0, "crc"));
|
|
|
+
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV2, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV2A, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV3, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV3M, "thumb"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV4, "dsp"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV4T, "dsp"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5T, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5TE, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5TEJ, "simd"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6K, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6T2, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6KZ, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6M, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7A, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7R, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7M, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7EM, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8A, "ras"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8_1A, "ras"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8_2A, "spe"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8R, "ras"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8MBaseline, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8MMainline, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_IWMMXT, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_IWMMXT2, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_XSCALE, "crc"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7S, "crypto"));
|
|
|
+ EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7K, "crypto"));
|
|
|
}
|
|
|
|
|
|
TEST(TargetParserTest, ARMFPUVersion) {
|
|
@@ -153,31 +439,6 @@ TEST(TargetParserTest, ARMFPURestriction) {
|
|
|
EXPECT_LE(0U, ARM::getFPURestriction(FK));
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, ARMDefaultFPU) {
|
|
|
- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
|
|
|
- AK < ARM::ArchKind::AK_LAST;
|
|
|
- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
|
|
|
- EXPECT_EQ(kARMARCHNames[AK].DefaultFPU,
|
|
|
- ARM::getDefaultFPU(StringRef("generic"), AK));
|
|
|
-
|
|
|
- for (const auto &ARMCPUName : kARMCPUNames)
|
|
|
- EXPECT_EQ(ARMCPUName.DefaultFPU, ARM::getDefaultFPU(ARMCPUName.Name, 0));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, ARMDefaultExtensions) {
|
|
|
- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
|
|
|
- AK < ARM::ArchKind::AK_LAST;
|
|
|
- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
|
|
|
- EXPECT_EQ(kARMARCHNames[AK].ArchBaseExtensions,
|
|
|
- ARM::getDefaultExtensions(StringRef("generic"), AK));
|
|
|
-
|
|
|
- for (const auto &ARMCPUName : kARMCPUNames) {
|
|
|
- unsigned DefaultExt =
|
|
|
- kARMARCHNames[ARMCPUName.ID].ArchBaseExtensions | ARMCPUName.DefaultExt;
|
|
|
- EXPECT_EQ(DefaultExt, ARM::getDefaultExtensions(ARMCPUName.Name, 0));
|
|
|
- }
|
|
|
-}
|
|
|
-
|
|
|
TEST(TargetParserTest, ARMExtensionFeatures) {
|
|
|
std::vector<StringRef> Features;
|
|
|
unsigned Extensions = ARM::AEK_CRC | ARM::AEK_CRYPTO | ARM::AEK_DSP |
|
|
@@ -199,15 +460,6 @@ TEST(TargetParserTest, ARMFPUFeatures) {
|
|
|
: ARM::getFPUFeatures(FK, Features));
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, ARMArchAttr) {
|
|
|
- for (ARM::ArchKind AK = static_cast<ARM::ArchKind>(0);
|
|
|
- AK <= ARM::ArchKind::AK_LAST;
|
|
|
- AK = static_cast<ARM::ArchKind>(static_cast<unsigned>(AK) + 1))
|
|
|
- EXPECT_TRUE(AK == ARM::AK_LAST
|
|
|
- ? (ARMBuildAttrs::CPUArch::Pre_v4 == ARM::getArchAttr(AK))
|
|
|
- : (kARMARCHNames[AK].ArchAttr == ARM::getArchAttr(AK)));
|
|
|
-}
|
|
|
-
|
|
|
TEST(TargetParserTest, ARMArchExtFeature) {
|
|
|
const char *ArchExt[][4] = {{"crc", "nocrc", "+crc", "-crc"},
|
|
|
{"crypto", "nocrypto", "+crypto", "-crypto"},
|
|
@@ -232,11 +484,6 @@ TEST(TargetParserTest, ARMArchExtFeature) {
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, ARMDefaultCPU) {
|
|
|
- for (unsigned i = 0; i < array_lengthof(ARMArch); i++)
|
|
|
- EXPECT_FALSE(ARM::getDefaultCPU(ARMArch[i]).empty());
|
|
|
-}
|
|
|
-
|
|
|
TEST(TargetParserTest, ARMparseHWDiv) {
|
|
|
const char *hwdiv[] = {"thumb", "arm", "arm,thumb", "thumb,arm"};
|
|
|
|
|
@@ -244,90 +491,6 @@ TEST(TargetParserTest, ARMparseHWDiv) {
|
|
|
EXPECT_NE(ARM::AEK_INVALID, ARM::parseHWDiv((StringRef)hwdiv[i]));
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, ARMparseFPU) {
|
|
|
- const char *FPU[] = {"vfp",
|
|
|
- "vfpv2",
|
|
|
- "vfp2",
|
|
|
- "vfpv3",
|
|
|
- "vfp3",
|
|
|
- "vfpv3-fp16",
|
|
|
- "vfpv3-d16",
|
|
|
- "vfp3-d16",
|
|
|
- "vfpv3-d16-fp16",
|
|
|
- "vfpv3xd",
|
|
|
- "vfpv3xd-fp16",
|
|
|
- "vfpv4",
|
|
|
- "vfp4",
|
|
|
- "vfpv4-d16",
|
|
|
- "vfp4-d16",
|
|
|
- "fp4-dp-d16",
|
|
|
- "fpv4-dp-d16",
|
|
|
- "fpv4-sp-d16",
|
|
|
- "fp4-sp-d16",
|
|
|
- "vfpv4-sp-d16",
|
|
|
- "fpv5-d16",
|
|
|
- "fp5-dp-d16",
|
|
|
- "fpv5-dp-d16",
|
|
|
- "fpv5-sp-d16",
|
|
|
- "fp5-sp-d16",
|
|
|
- "fp-armv8",
|
|
|
- "neon",
|
|
|
- "neon-vfpv3",
|
|
|
- "neon-fp16",
|
|
|
- "neon-vfpv4",
|
|
|
- "neon-fp-armv8",
|
|
|
- "crypto-neon-fp-armv8",
|
|
|
- "softvfp"};
|
|
|
-
|
|
|
- for (unsigned i = 0; i < array_lengthof(FPU); i++)
|
|
|
- EXPECT_NE(ARM::FK_INVALID, ARM::parseFPU((StringRef)FPU[i]));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, ARMparseArch) {
|
|
|
- for (unsigned i = 0; i < array_lengthof(ARMArch); i++)
|
|
|
- EXPECT_NE(ARM::AEK_INVALID, ARM::parseArch(ARMArch[i]));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, ARMparseArchExt) {
|
|
|
- const char *ArchExt[] = {"none", "crc", "crypto", "dsp", "fp",
|
|
|
- "idiv", "mp", "simd", "sec", "virt",
|
|
|
- "fp16", "ras", "os", "iwmmxt", "iwmmxt2",
|
|
|
- "maverick", "xscale"};
|
|
|
-
|
|
|
- for (unsigned i = 0; i < array_lengthof(ArchExt); i++)
|
|
|
- EXPECT_NE(ARM::AEK_INVALID, ARM::parseArchExt(ArchExt[i]));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, ARMparseCPUArch) {
|
|
|
- const char *CPU[] = {
|
|
|
- "arm2", "arm3", "arm6", "arm7m",
|
|
|
- "arm8", "arm810", "strongarm", "strongarm110",
|
|
|
- "strongarm1100", "strongarm1110", "arm7tdmi", "arm7tdmi-s",
|
|
|
- "arm710t", "arm720t", "arm9", "arm9tdmi",
|
|
|
- "arm920", "arm920t", "arm922t", "arm9312",
|
|
|
- "arm940t", "ep9312", "arm10tdmi", "arm1020t",
|
|
|
- "arm9e", "arm946e-s", "arm966e-s", "arm968e-s",
|
|
|
- "arm10e", "arm1020e", "arm1022e", "arm926ej-s",
|
|
|
- "arm1136j-s", "arm1136jf-s", "arm1136jz-s", "arm1176j-s",
|
|
|
- "arm1176jz-s", "mpcore", "mpcorenovfp", "arm1176jzf-s",
|
|
|
- "arm1156t2-s", "arm1156t2f-s", "cortex-m0", "cortex-m0plus",
|
|
|
- "cortex-m1", "sc000", "cortex-a5", "cortex-a7",
|
|
|
- "cortex-a8", "cortex-a9", "cortex-a12", "cortex-a15",
|
|
|
- "cortex-a17", "krait", "cortex-r4", "cortex-r4f",
|
|
|
- "cortex-r5", "cortex-r7", "cortex-r8", "sc300",
|
|
|
- "cortex-m3", "cortex-m4", "cortex-m7", "cortex-a32",
|
|
|
- "cortex-a35", "cortex-a53", "cortex-a57", "cortex-a72",
|
|
|
- "cortex-a73", "cyclone", "exynos-m1", "exynos-m2",
|
|
|
- "iwmmxt", "xscale", "swift", "cortex-r52"};
|
|
|
-
|
|
|
- for (const auto &ARMCPUName : kARMCPUNames) {
|
|
|
- if (contains(CPU, ARMCPUName.Name))
|
|
|
- EXPECT_NE(ARM::AK_INVALID, ARM::parseCPUArch(ARMCPUName.Name));
|
|
|
- else
|
|
|
- EXPECT_EQ(ARM::AK_INVALID, ARM::parseCPUArch(ARMCPUName.Name));
|
|
|
- }
|
|
|
-}
|
|
|
-
|
|
|
TEST(TargetParserTest, ARMparseArchEndianAndISA) {
|
|
|
const char *Arch[] = {
|
|
|
"v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t",
|
|
@@ -383,6 +546,7 @@ TEST(TargetParserTest, ARMparseArchProfile) {
|
|
|
EXPECT_EQ(ARM::PK_M, ARM::parseArchProfile(ARMArch[i]));
|
|
|
continue;
|
|
|
case ARM::AK_ARMV7R:
|
|
|
+ case ARM::AK_ARMV8R:
|
|
|
EXPECT_EQ(ARM::PK_R, ARM::parseArchProfile(ARMArch[i]));
|
|
|
continue;
|
|
|
case ARM::AK_ARMV7A:
|
|
@@ -405,29 +569,109 @@ TEST(TargetParserTest, ARMparseArchVersion) {
|
|
|
EXPECT_EQ(5u, ARM::parseArchVersion(ARMArch[i]));
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, AArch64DefaultFPU) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_EQ(kAArch64ARCHNames[AK].DefaultFPU,
|
|
|
- AArch64::getDefaultFPU(StringRef("generic"), AK));
|
|
|
-
|
|
|
- for (const auto &AArch64CPUName : kAArch64CPUNames)
|
|
|
- EXPECT_EQ(AArch64CPUName.DefaultFPU,
|
|
|
- AArch64::getDefaultFPU(AArch64CPUName.Name,
|
|
|
- static_cast<unsigned>(AArch64CPUName.ID)));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64DefaultExt) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_EQ(kAArch64ARCHNames[AK].ArchBaseExtensions,
|
|
|
- AArch64::getDefaultExtensions(StringRef("generic"), AK));
|
|
|
-
|
|
|
- for (const auto &AArch64CPUName : kAArch64CPUNames)
|
|
|
- EXPECT_EQ(
|
|
|
- AArch64CPUName.DefaultExt,
|
|
|
- AArch64::getDefaultExtensions(
|
|
|
- AArch64CPUName.Name, static_cast<unsigned>(AArch64CPUName.ID)));
|
|
|
+bool testAArch64CPU(StringRef CPUName, StringRef ExpectedArch,
|
|
|
+ StringRef ExpectedFPU, unsigned ExpectedFlags,
|
|
|
+ StringRef CPUAttr) {
|
|
|
+ unsigned ArchKind = AArch64::parseCPUArch(CPUName);
|
|
|
+ bool pass = AArch64::getArchName(ArchKind).equals(ExpectedArch);
|
|
|
+ unsigned FPUKind = AArch64::getDefaultFPU(CPUName, ArchKind);
|
|
|
+ pass &= AArch64::getFPUName(FPUKind).equals(ExpectedFPU);
|
|
|
+
|
|
|
+ unsigned ExtKind = AArch64::getDefaultExtensions(CPUName, ArchKind);
|
|
|
+ if (ExtKind > 1 && (ExtKind & AArch64::AEK_NONE))
|
|
|
+ pass &= ((ExtKind ^ AArch64::AEK_NONE) == ExpectedFlags);
|
|
|
+ else
|
|
|
+ pass &= (ExtKind == ExpectedFlags);
|
|
|
+
|
|
|
+ pass &= AArch64::getCPUAttr(ArchKind).equals(CPUAttr);
|
|
|
+
|
|
|
+ return pass;
|
|
|
+}
|
|
|
+
|
|
|
+TEST(TargetParserTest, testAArch64CPU) {
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "invalid", "invalid", "invalid",
|
|
|
+ AArch64::AEK_INVALID, ""));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "generic", "invalid", "none",
|
|
|
+ AArch64::AEK_NONE, ""));
|
|
|
+
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cortex-a35", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cortex-a53", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cortex-a57", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cortex-a72", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cortex-a73", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "cyclone", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "exynos-m1", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "exynos-m2", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "falkor", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "kryo", "armv8-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8-A"));
|
|
|
+ EXPECT_TRUE(testAArch64CPU(
|
|
|
+ "vulcan", "armv8.1-a", "crypto-neon-fp-armv8",
|
|
|
+ AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_SIMD, "8.1-A"));
|
|
|
+}
|
|
|
+
|
|
|
+bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
|
|
|
+ unsigned ArchAttr) {
|
|
|
+ unsigned ArchKind = AArch64::parseArch(Arch);
|
|
|
+ return (ArchKind != static_cast<unsigned>(AArch64::ArchKind::AK_INVALID)) &
|
|
|
+ AArch64::getDefaultCPU(Arch).equals(DefaultCPU) &
|
|
|
+ AArch64::getSubArch(ArchKind).equals(SubArch) &
|
|
|
+ (AArch64::getArchAttr(ArchKind) == ArchAttr);
|
|
|
+}
|
|
|
+
|
|
|
+TEST(TargetParserTest, testAArch64Arch) {
|
|
|
+ EXPECT_TRUE(testAArch64Arch("armv8-a", "cortex-a53", "v8",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+ EXPECT_TRUE(testAArch64Arch("armv8.1-a", "generic", "v8.1a",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+ EXPECT_TRUE(testAArch64Arch("armv8.2-a", "generic", "v8.2a",
|
|
|
+ ARMBuildAttrs::CPUArch::v8_A));
|
|
|
+}
|
|
|
+
|
|
|
+bool testAArch64Extension(StringRef CPUName, unsigned ArchKind,
|
|
|
+ StringRef ArchExt) {
|
|
|
+ return AArch64::getDefaultExtensions(CPUName, ArchKind) &
|
|
|
+ AArch64::parseArchExt(ArchExt);
|
|
|
+}
|
|
|
+
|
|
|
+TEST(TargetParserTest, testAArch64Extension) {
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cortex-a35", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cortex-a53", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cortex-a57", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cortex-a72", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cortex-a73", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("cyclone", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("exynos-m1", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("kryo", 0, "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension("vulcan", 0, "ras"));
|
|
|
+
|
|
|
+ EXPECT_FALSE(testAArch64Extension(
|
|
|
+ "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8A), "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension(
|
|
|
+ "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_1A), "ras"));
|
|
|
+ EXPECT_FALSE(testAArch64Extension(
|
|
|
+ "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_2A), "spe"));
|
|
|
}
|
|
|
|
|
|
TEST(TargetParserTest, AArch64ExtensionFeatures) {
|
|
@@ -453,50 +697,6 @@ TEST(TargetParserTest, AArch64ArchFeatures) {
|
|
|
: AArch64::getArchFeatures(AK, Features));
|
|
|
}
|
|
|
|
|
|
-TEST(TargetParserTest, AArch64ArchName) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_TRUE(AK == static_cast<unsigned>(AArch64::ArchKind::AK_LAST)
|
|
|
- ? AArch64::getArchName(AK).empty()
|
|
|
- : !AArch64::getArchName(AK).empty());
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64CPUAttr) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_TRUE((AK == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
|
|
|
- AK == static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
|
|
|
- ? AArch64::getCPUAttr(AK).empty()
|
|
|
- : !AArch64::getCPUAttr(AK).empty());
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64SubArch) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_TRUE((AK == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
|
|
|
- AK == static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
|
|
|
- ? AArch64::getSubArch(AK).empty()
|
|
|
- : !AArch64::getSubArch(AK).empty());
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64ArchAttr) {
|
|
|
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
|
|
|
- AK++)
|
|
|
- EXPECT_TRUE(
|
|
|
- AK == static_cast<unsigned>(AArch64::ArchKind::AK_LAST)
|
|
|
- ? (ARMBuildAttrs::CPUArch::v8_A == AArch64::getArchAttr(AK))
|
|
|
- : (kAArch64ARCHNames[AK].ArchAttr == AArch64::getArchAttr(AK)));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64ArchExtName) {
|
|
|
- for (AArch64::ArchExtKind AEK = static_cast<AArch64::ArchExtKind>(0);
|
|
|
- AEK <= AArch64::ArchExtKind::AEK_RAS;
|
|
|
- AEK = static_cast<AArch64::ArchExtKind>(static_cast<unsigned>(AEK) + 1))
|
|
|
- EXPECT_TRUE(contains(kAArch64ArchExtKinds, static_cast<unsigned>(AEK))
|
|
|
- ? !AArch64::getArchExtName(AEK).empty()
|
|
|
- : AArch64::getArchExtName(AEK).empty());
|
|
|
-}
|
|
|
-
|
|
|
TEST(TargetParserTest, AArch64ArchExtFeature) {
|
|
|
const char *ArchExt[][4] = {{"crc", "nocrc", "+crc", "-crc"},
|
|
|
{"crypto", "nocrypto", "+crypto", "-crypto"},
|
|
@@ -507,58 +707,10 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
|
|
|
{"ras", "noras", "+ras", "-ras"}};
|
|
|
|
|
|
for (unsigned i = 0; i < array_lengthof(ArchExt); i++) {
|
|
|
- EXPECT_EQ(StringRef(ArchExt[i][2]), AArch64::getArchExtFeature(ArchExt[i][0]));
|
|
|
- EXPECT_EQ(StringRef(ArchExt[i][3]), AArch64::getArchExtFeature(ArchExt[i][1]));
|
|
|
+ EXPECT_EQ(StringRef(ArchExt[i][2]),
|
|
|
+ AArch64::getArchExtFeature(ArchExt[i][0]));
|
|
|
+ EXPECT_EQ(StringRef(ArchExt[i][3]),
|
|
|
+ AArch64::getArchExtFeature(ArchExt[i][1]));
|
|
|
}
|
|
|
}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64DefaultCPU) {
|
|
|
- const char *Arch[] = {"armv8a", "armv8-a", "armv8", "armv8.1a",
|
|
|
- "armv8.1-a", "armv8.2a", "armv8.2-a"};
|
|
|
-
|
|
|
- for (unsigned i = 0; i < array_lengthof(Arch); i++)
|
|
|
- EXPECT_FALSE(AArch64::getDefaultCPU(Arch[i]).empty());
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64parseArch) {
|
|
|
- const char *Arch[] = {"armv8", "armv8a", "armv8-a", "armv8.1a",
|
|
|
- "armv8.1-a", "armv8.2a", "armv8.2-a"};
|
|
|
-
|
|
|
- for (unsigned i = 0; i < array_lengthof(Arch); i++)
|
|
|
- EXPECT_NE(static_cast<unsigned>(AArch64::ArchKind::AK_INVALID),
|
|
|
- AArch64::parseArch(Arch[i]));
|
|
|
- EXPECT_EQ(static_cast<unsigned>(AArch64::ArchKind::AK_INVALID),
|
|
|
- AArch64::parseArch("aarch64"));
|
|
|
- EXPECT_EQ(static_cast<unsigned>(AArch64::ArchKind::AK_INVALID),
|
|
|
- AArch64::parseArch("arm64"));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64parseArchExt) {
|
|
|
- const char *ArchExt[] = {"none", "crc", "crypto", "fp",
|
|
|
- "simd", "fp16", "profile", "ras"};
|
|
|
-
|
|
|
- for (unsigned i = 0; i < array_lengthof(ArchExt); i++)
|
|
|
- EXPECT_NE(AArch64::AEK_INVALID, AArch64::parseArchExt(ArchExt[i]));
|
|
|
-}
|
|
|
-
|
|
|
-TEST(TargetParserTest, AArch64parseCPUArch) {
|
|
|
- const char *CPU[] = {"cortex-a35",
|
|
|
- "cortex-a53",
|
|
|
- "cortex-a57",
|
|
|
- "cortex-a72",
|
|
|
- "cortex-a73",
|
|
|
- "cyclone",
|
|
|
- "exynos-m1",
|
|
|
- "exynos-m2",
|
|
|
- "falkor",
|
|
|
- "kryo",
|
|
|
- "vulcan"};
|
|
|
-
|
|
|
- for (const auto &AArch64CPUName : kAArch64CPUNames)
|
|
|
- EXPECT_TRUE(contains(CPU, AArch64CPUName.Name)
|
|
|
- ? (static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) !=
|
|
|
- AArch64::parseCPUArch(AArch64CPUName.Name))
|
|
|
- : (static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ==
|
|
|
- AArch64::parseCPUArch(AArch64CPUName.Name)));
|
|
|
-}
|
|
|
}
|