target_parallel_num_threads_codegen.cpp 17 KB

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  1. // Test host codegen.
  2. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
  3. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  4. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
  5. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
  6. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  7. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
  8. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  9. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  10. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  11. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  12. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  13. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  14. // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
  15. // Test target codegen - host bc file has to be created first.
  16. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  17. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
  18. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  19. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
  20. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  21. // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
  22. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  23. // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
  24. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  25. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  26. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  27. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  28. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  29. // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  30. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  31. // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  32. // SIMD-ONLY1-NOT: {{__kmpc|__tgt}}
  33. // expected-no-diagnostics
  34. #ifndef HEADER
  35. #define HEADER
  36. // CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* }
  37. // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
  38. // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
  39. // CHECK-DAG: [[S1:%.+]] = type { double }
  40. // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
  41. // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 }
  42. // We have 6 target regions
  43. // CHECK-DAG: @{{.*}} = weak constant i8 0
  44. // CHECK-DAG: @{{.*}} = weak constant i8 0
  45. // CHECK-DAG: @{{.*}} = weak constant i8 0
  46. // CHECK-DAG: @{{.*}} = weak constant i8 0
  47. // CHECK-DAG: @{{.*}} = weak constant i8 0
  48. // CHECK-DAG: @{{.*}} = weak constant i8 0
  49. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  50. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  51. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  52. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  53. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  54. // TCHECK: @{{.+}} = weak constant [[ENTTY]]
  55. // Check target registration is registered as a Ctor.
  56. // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }]
  57. template<typename tx>
  58. tx ftemplate(int n) {
  59. tx a = 0;
  60. #pragma omp target parallel num_threads(tx(20))
  61. {
  62. }
  63. short b = 1;
  64. #pragma omp target parallel num_threads(b)
  65. {
  66. a += b;
  67. }
  68. return a;
  69. }
  70. static
  71. int fstatic(int n) {
  72. #pragma omp target parallel num_threads(n)
  73. {
  74. }
  75. #pragma omp target parallel num_threads(32+n)
  76. {
  77. }
  78. return n+1;
  79. }
  80. struct S1 {
  81. double a;
  82. int r1(int n){
  83. int b = 1;
  84. #pragma omp target parallel num_threads(n-b)
  85. {
  86. this->a = (double)b + 1.5;
  87. }
  88. #pragma omp target parallel num_threads(1024)
  89. {
  90. this->a = 2.5;
  91. }
  92. return (int)a;
  93. }
  94. };
  95. // CHECK: define {{.*}}@{{.*}}bar{{.*}}
  96. int bar(int n){
  97. int a = 0;
  98. S1 S;
  99. // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
  100. a += S.r1(n);
  101. // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
  102. a += fstatic(n);
  103. // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
  104. a += ftemplate<int>(n);
  105. return a;
  106. }
  107. //
  108. // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]])
  109. //
  110. // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
  111. // CHECK: store i32 1, i32* [[B:%.+]], align
  112. // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
  113. // CHECK: [[BV:%.+]] = load i32, i32* [[B]], align
  114. // CHECK: [[SUB:%.+]] = sub nsw i32 [[NV]], [[BV]]
  115. // CHECK: store i32 [[SUB]], i32* [[CAPE_ADDR:%.+]], align
  116. // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  117. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
  118. // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align
  119. // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
  120. // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
  121. // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  122. //
  123. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, {{.*}}, i32 1, i32 [[THREADS]])
  124. // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  125. // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  126. //
  127. // CHECK: [[FAIL]]
  128. // CHECK: call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
  129. // CHECK: br label {{%?}}[[END]]
  130. // CHECK: [[END]]
  131. //
  132. //
  133. //
  134. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.+}}, i32 1, i32 1024)
  135. // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  136. // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  137. //
  138. // CHECK: [[FAIL]]
  139. // CHECK: call void [[HVT2:@.+]]([[S1]]* {{[^,]+}})
  140. // CHECK: br label {{%?}}[[END]]
  141. // CHECK: [[END]]
  142. //
  143. //
  144. // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]])
  145. //
  146. // CHECK-DAG: store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
  147. // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
  148. // CHECK: store i32 [[NV]], i32* [[CAPE_ADDR:%.+]], align
  149. // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  150. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
  151. // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align
  152. // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
  153. // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
  154. // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  155. //
  156. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]])
  157. // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  158. // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  159. //
  160. // CHECK: [[FAIL]]
  161. // CHECK: call void [[HVT3:@.+]](i[[SZ]] [[ARG]])
  162. // CHECK: br label {{%?}}[[END]]
  163. // CHECK: [[END]]
  164. //
  165. //
  166. //
  167. // CHECK: [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
  168. // CHECK: [[ADD:%.+]] = add nsw i32 32, [[NV]]
  169. // CHECK: store i32 [[ADD]], i32* [[CAPE_ADDR:%.+]], align
  170. // CHECK: [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  171. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
  172. // CHECK-64: store i32 [[CEV]], i32* [[CONV]], align
  173. // CHECK-32: store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
  174. // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
  175. // CHECK: [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  176. //
  177. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]])
  178. // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  179. // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  180. //
  181. // CHECK: [[FAIL]]
  182. // CHECK: call void [[HVT4:@.+]](i[[SZ]] [[ARG]])
  183. // CHECK: br label {{%?}}[[END]]
  184. // CHECK: [[END]]
  185. //
  186. //
  187. // CHECK: define {{.*}}[[FTEMPLATE]]
  188. //
  189. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 20)
  190. // CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  191. // CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  192. //
  193. // CHECK: [[FAIL]]
  194. // CHECK: call void [[HVT5:@.+]]()
  195. // CHECK: br label {{%?}}[[END]]
  196. //
  197. // CHECK: [[END]]
  198. //
  199. //
  200. //
  201. // CHECK: store i16 1, i16* [[B:%.+]], align
  202. // CHECK: [[BV:%.+]] = load i16, i16* [[B]], align
  203. // CHECK: store i16 [[BV]], i16* [[CAPE_ADDR:%.+]], align
  204. // CHECK: [[CEV:%.+]] = load i16, i16* [[CAPE_ADDR]], align
  205. // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i16*
  206. // CHECK: store i16 [[CEV]], i16* [[CONV]], align
  207. // CHECK: [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
  208. // CHECK: [[T:%.+]] = load i16, i16* [[CAPE_ADDR]], align
  209. // CHECK: [[THREADS:%.+]] = zext i16 [[T]] to i32
  210. //
  211. // CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[THREADS]])
  212. // CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
  213. // CHECK: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
  214. //
  215. // CHECK: [[FAIL]]
  216. // CHECK: call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
  217. // CHECK: br label {{%?}}[[END]]
  218. // CHECK: [[END]]
  219. //
  220. // Check that the offloading functions are emitted and that the parallel function
  221. // is appropriately guarded.
  222. // CHECK: define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]])
  223. // CHECK-DAG: store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
  224. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
  225. // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align
  226. // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  227. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
  228. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2,
  229. //
  230. //
  231. // CHECK: define internal void [[HVT2]]([[S1]]* {{%.+}})
  232. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 1024)
  233. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1,
  234. //
  235. //
  236. // CHECK: define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]])
  237. // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
  238. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
  239. // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align
  240. // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  241. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
  242. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
  243. //
  244. //
  245. // CHECK: define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]])
  246. // CHECK-DAG: store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
  247. // CHECK-64: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
  248. // CHECK-64: [[NT:%.+]] = load i32, i32* [[CONV]], align
  249. // CHECK-32: [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
  250. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
  251. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
  252. //
  253. //
  254. // CHECK: define internal void [[HVT5]](
  255. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 20)
  256. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
  257. //
  258. //
  259. // CHECK: define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]])
  260. // CHECK-DAG: store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
  261. // CHECK: [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16*
  262. // CHECK: [[T:%.+]] = load i16, i16* [[CONV]], align
  263. // CHECK: [[NT:%.+]] = sext i16 [[T]] to i32
  264. // CHECK: call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
  265. // CHECK: call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2,
  266. //
  267. //
  268. #endif