CGRecordLayout.h 10 KB

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  1. //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H
  10. #define CLANG_CODEGEN_CGRECORDLAYOUT_H
  11. #include "clang/AST/CharUnits.h"
  12. #include "clang/AST/Decl.h"
  13. #include "clang/Basic/LLVM.h"
  14. #include "llvm/ADT/DenseMap.h"
  15. #include "llvm/DerivedTypes.h"
  16. namespace llvm {
  17. class StructType;
  18. }
  19. namespace clang {
  20. namespace CodeGen {
  21. /// \brief Helper object for describing how to generate the code for access to a
  22. /// bit-field.
  23. ///
  24. /// This structure is intended to describe the "policy" of how the bit-field
  25. /// should be accessed, which may be target, language, or ABI dependent.
  26. class CGBitFieldInfo {
  27. public:
  28. /// Descriptor for a single component of a bit-field access. The entire
  29. /// bit-field is constituted of a bitwise OR of all of the individual
  30. /// components.
  31. ///
  32. /// Each component describes an accessed value, which is how the component
  33. /// should be transferred to/from memory, and a target placement, which is how
  34. /// that component fits into the constituted bit-field. The pseudo-IR for a
  35. /// load is:
  36. ///
  37. /// %0 = gep %base, 0, FieldIndex
  38. /// %1 = gep (i8*) %0, FieldByteOffset
  39. /// %2 = (i(AccessWidth) *) %1
  40. /// %3 = load %2, align AccessAlignment
  41. /// %4 = shr %3, FieldBitStart
  42. ///
  43. /// and the composed bit-field is formed as the boolean OR of all accesses,
  44. /// masked to TargetBitWidth bits and shifted to TargetBitOffset.
  45. struct AccessInfo {
  46. /// Offset of the field to load in the LLVM structure, if any.
  47. unsigned FieldIndex;
  48. /// Byte offset from the field address, if any. This should generally be
  49. /// unused as the cleanest IR comes from having a well-constructed LLVM type
  50. /// with proper GEP instructions, but sometimes its use is required, for
  51. /// example if an access is intended to straddle an LLVM field boundary.
  52. CharUnits FieldByteOffset;
  53. /// Bit offset in the accessed value to use. The width is implied by \see
  54. /// TargetBitWidth.
  55. unsigned FieldBitStart;
  56. /// Bit width of the memory access to perform.
  57. unsigned AccessWidth;
  58. /// The alignment of the memory access, or 0 if the default alignment should
  59. /// be used.
  60. //
  61. // FIXME: Remove use of 0 to encode default, instead have IRgen do the right
  62. // thing when it generates the code, if avoiding align directives is
  63. // desired.
  64. CharUnits AccessAlignment;
  65. /// Offset for the target value.
  66. unsigned TargetBitOffset;
  67. /// Number of bits in the access that are destined for the bit-field.
  68. unsigned TargetBitWidth;
  69. };
  70. private:
  71. /// The components to use to access the bit-field. We may need up to three
  72. /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte
  73. /// accesses).
  74. //
  75. // FIXME: De-hardcode this, just allocate following the struct.
  76. AccessInfo Components[3];
  77. /// The total size of the bit-field, in bits.
  78. unsigned Size;
  79. /// The number of access components to use.
  80. unsigned NumComponents;
  81. /// Whether the bit-field is signed.
  82. bool IsSigned : 1;
  83. public:
  84. CGBitFieldInfo(unsigned Size, unsigned NumComponents, AccessInfo *_Components,
  85. bool IsSigned) : Size(Size), NumComponents(NumComponents),
  86. IsSigned(IsSigned) {
  87. assert(NumComponents <= 3 && "invalid number of components!");
  88. for (unsigned i = 0; i != NumComponents; ++i)
  89. Components[i] = _Components[i];
  90. // Check some invariants.
  91. unsigned AccessedSize = 0;
  92. for (unsigned i = 0, e = getNumComponents(); i != e; ++i) {
  93. const AccessInfo &AI = getComponent(i);
  94. AccessedSize += AI.TargetBitWidth;
  95. // We shouldn't try to load 0 bits.
  96. assert(AI.TargetBitWidth > 0);
  97. // We can't load more bits than we accessed.
  98. assert(AI.FieldBitStart + AI.TargetBitWidth <= AI.AccessWidth);
  99. // We shouldn't put any bits outside the result size.
  100. assert(AI.TargetBitWidth + AI.TargetBitOffset <= Size);
  101. }
  102. // Check that the total number of target bits matches the total bit-field
  103. // size.
  104. assert(AccessedSize == Size && "Total size does not match accessed size!");
  105. }
  106. public:
  107. /// \brief Check whether this bit-field access is (i.e., should be sign
  108. /// extended on loads).
  109. bool isSigned() const { return IsSigned; }
  110. /// \brief Get the size of the bit-field, in bits.
  111. unsigned getSize() const { return Size; }
  112. /// @name Component Access
  113. /// @{
  114. unsigned getNumComponents() const { return NumComponents; }
  115. const AccessInfo &getComponent(unsigned Index) const {
  116. assert(Index < getNumComponents() && "Invalid access!");
  117. return Components[Index];
  118. }
  119. /// @}
  120. void print(raw_ostream &OS) const;
  121. void dump() const;
  122. /// \brief Given a bit-field decl, build an appropriate helper object for
  123. /// accessing that field (which is expected to have the given offset and
  124. /// size).
  125. static CGBitFieldInfo MakeInfo(class CodeGenTypes &Types, const FieldDecl *FD,
  126. uint64_t FieldOffset, uint64_t FieldSize);
  127. /// \brief Given a bit-field decl, build an appropriate helper object for
  128. /// accessing that field (which is expected to have the given offset and
  129. /// size). The field decl should be known to be contained within a type of at
  130. /// least the given size and with the given alignment.
  131. static CGBitFieldInfo MakeInfo(CodeGenTypes &Types, const FieldDecl *FD,
  132. uint64_t FieldOffset, uint64_t FieldSize,
  133. uint64_t ContainingTypeSizeInBits,
  134. unsigned ContainingTypeAlign);
  135. };
  136. /// CGRecordLayout - This class handles struct and union layout info while
  137. /// lowering AST types to LLVM types.
  138. ///
  139. /// These layout objects are only created on demand as IR generation requires.
  140. class CGRecordLayout {
  141. friend class CodeGenTypes;
  142. CGRecordLayout(const CGRecordLayout&); // DO NOT IMPLEMENT
  143. void operator=(const CGRecordLayout&); // DO NOT IMPLEMENT
  144. private:
  145. /// The LLVM type corresponding to this record layout; used when
  146. /// laying it out as a complete object.
  147. llvm::StructType *CompleteObjectType;
  148. /// The LLVM type for the non-virtual part of this record layout;
  149. /// used when laying it out as a base subobject.
  150. llvm::StructType *BaseSubobjectType;
  151. /// Map from (non-bit-field) struct field to the corresponding llvm struct
  152. /// type field no. This info is populated by record builder.
  153. llvm::DenseMap<const FieldDecl *, unsigned> FieldInfo;
  154. /// Map from (bit-field) struct field to the corresponding llvm struct type
  155. /// field no. This info is populated by record builder.
  156. llvm::DenseMap<const FieldDecl *, CGBitFieldInfo> BitFields;
  157. // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
  158. // map for both virtual and non virtual bases.
  159. llvm::DenseMap<const CXXRecordDecl *, unsigned> NonVirtualBases;
  160. /// Map from virtual bases to their field index in the complete object.
  161. llvm::DenseMap<const CXXRecordDecl *, unsigned> CompleteObjectVirtualBases;
  162. /// False if any direct or indirect subobject of this class, when
  163. /// considered as a complete object, requires a non-zero bitpattern
  164. /// when zero-initialized.
  165. bool IsZeroInitializable : 1;
  166. /// False if any direct or indirect subobject of this class, when
  167. /// considered as a base subobject, requires a non-zero bitpattern
  168. /// when zero-initialized.
  169. bool IsZeroInitializableAsBase : 1;
  170. public:
  171. CGRecordLayout(llvm::StructType *CompleteObjectType,
  172. llvm::StructType *BaseSubobjectType,
  173. bool IsZeroInitializable,
  174. bool IsZeroInitializableAsBase)
  175. : CompleteObjectType(CompleteObjectType),
  176. BaseSubobjectType(BaseSubobjectType),
  177. IsZeroInitializable(IsZeroInitializable),
  178. IsZeroInitializableAsBase(IsZeroInitializableAsBase) {}
  179. /// \brief Return the "complete object" LLVM type associated with
  180. /// this record.
  181. llvm::StructType *getLLVMType() const {
  182. return CompleteObjectType;
  183. }
  184. /// \brief Return the "base subobject" LLVM type associated with
  185. /// this record.
  186. llvm::StructType *getBaseSubobjectLLVMType() const {
  187. return BaseSubobjectType;
  188. }
  189. /// \brief Check whether this struct can be C++ zero-initialized
  190. /// with a zeroinitializer.
  191. bool isZeroInitializable() const {
  192. return IsZeroInitializable;
  193. }
  194. /// \brief Check whether this struct can be C++ zero-initialized
  195. /// with a zeroinitializer when considered as a base subobject.
  196. bool isZeroInitializableAsBase() const {
  197. return IsZeroInitializableAsBase;
  198. }
  199. /// \brief Return llvm::StructType element number that corresponds to the
  200. /// field FD.
  201. unsigned getLLVMFieldNo(const FieldDecl *FD) const {
  202. assert(!FD->isBitField() && "Invalid call for bit-field decl!");
  203. assert(FieldInfo.count(FD) && "Invalid field for record!");
  204. return FieldInfo.lookup(FD);
  205. }
  206. unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl *RD) const {
  207. assert(NonVirtualBases.count(RD) && "Invalid non-virtual base!");
  208. return NonVirtualBases.lookup(RD);
  209. }
  210. /// \brief Return the LLVM field index corresponding to the given
  211. /// virtual base. Only valid when operating on the complete object.
  212. unsigned getVirtualBaseIndex(const CXXRecordDecl *base) const {
  213. assert(CompleteObjectVirtualBases.count(base) && "Invalid virtual base!");
  214. return CompleteObjectVirtualBases.lookup(base);
  215. }
  216. /// \brief Return the BitFieldInfo that corresponds to the field FD.
  217. const CGBitFieldInfo &getBitFieldInfo(const FieldDecl *FD) const {
  218. assert(FD->isBitField() && "Invalid call for non bit-field decl!");
  219. llvm::DenseMap<const FieldDecl *, CGBitFieldInfo>::const_iterator
  220. it = BitFields.find(FD);
  221. assert(it != BitFields.end() && "Unable to find bitfield info");
  222. return it->second;
  223. }
  224. void print(raw_ostream &OS) const;
  225. void dump() const;
  226. };
  227. } // end namespace CodeGen
  228. } // end namespace clang
  229. #endif