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[X86] Add ENQCMD instructions

For more details about these instructions, please refer to the latest
ISE document:
https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference.

Patch by Tianqing Wang (tianqing)

Differential Revision: https://reviews.llvm.org/D62282

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@362685 91177308-0d34-0410-b5e6-96231b3b80d8
Pengfei Wang 6 years ago
parent
commit
6bd2547442

+ 2 - 0
docs/ClangCommandLineReference.rst

@@ -2657,6 +2657,8 @@ X86
 
 
 .. option:: -mcx16, -mno-cx16
 .. option:: -mcx16, -mno-cx16
 
 
+.. option:: -menqcmd, -mno-enqcmd
+
 .. option:: -mf16c, -mno-f16c
 .. option:: -mf16c, -mno-f16c
 
 
 .. option:: -mfma, -mno-fma
 .. option:: -mfma, -mno-fma

+ 4 - 0
include/clang/Basic/BuiltinsX86.def

@@ -1894,6 +1894,10 @@ TARGET_BUILTIN(__builtin_ia32_ptwrite32, "vUi", "n", "ptwrite")
 // INVPCID
 // INVPCID
 TARGET_BUILTIN(__builtin_ia32_invpcid, "vUiv*", "nc", "invpcid")
 TARGET_BUILTIN(__builtin_ia32_invpcid, "vUiv*", "nc", "invpcid")
 
 
+// ENQCMD
+TARGET_BUILTIN(__builtin_ia32_enqcmd, "Ucv*vC*", "n", "enqcmd")
+TARGET_BUILTIN(__builtin_ia32_enqcmds, "Ucv*vC*", "n", "enqcmd")
+
 // MSVC
 // MSVC
 TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
 TARGET_HEADER_BUILTIN(_BitScanForward, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
 TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")
 TARGET_HEADER_BUILTIN(_BitScanReverse, "UcUNi*UNi", "nh", "intrin.h", ALL_MS_LANGUAGES, "")

+ 2 - 0
include/clang/Driver/Options.td

@@ -2916,6 +2916,8 @@ def mclzero : Flag<["-"], "mclzero">, Group<m_x86_Features_Group>;
 def mno_clzero : Flag<["-"], "mno-clzero">, Group<m_x86_Features_Group>;
 def mno_clzero : Flag<["-"], "mno-clzero">, Group<m_x86_Features_Group>;
 def mcx16 : Flag<["-"], "mcx16">, Group<m_x86_Features_Group>;
 def mcx16 : Flag<["-"], "mcx16">, Group<m_x86_Features_Group>;
 def mno_cx16 : Flag<["-"], "mno-cx16">, Group<m_x86_Features_Group>;
 def mno_cx16 : Flag<["-"], "mno-cx16">, Group<m_x86_Features_Group>;
+def menqcmd : Flag<["-"], "menqcmd">, Group<m_x86_Features_Group>;
+def mno_enqcmd : Flag<["-"], "mno-enqcmd">, Group<m_x86_Features_Group>;
 def mf16c : Flag<["-"], "mf16c">, Group<m_x86_Features_Group>;
 def mf16c : Flag<["-"], "mf16c">, Group<m_x86_Features_Group>;
 def mno_f16c : Flag<["-"], "mno-f16c">, Group<m_x86_Features_Group>;
 def mno_f16c : Flag<["-"], "mno-f16c">, Group<m_x86_Features_Group>;
 def mfma : Flag<["-"], "mfma">, Group<m_x86_Features_Group>;
 def mfma : Flag<["-"], "mfma">, Group<m_x86_Features_Group>;

+ 6 - 0
lib/Basic/Targets/X86.cpp

@@ -835,6 +835,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasPTWRITE = true;
       HasPTWRITE = true;
     } else if (Feature == "+invpcid") {
     } else if (Feature == "+invpcid") {
       HasINVPCID = true;
       HasINVPCID = true;
+    } else if (Feature == "+enqcmd") {
+      HasENQCMD = true;
     }
     }
 
 
     X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
     X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
@@ -1218,6 +1220,8 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
     Builder.defineMacro("__PTWRITE__");
     Builder.defineMacro("__PTWRITE__");
   if (HasINVPCID)
   if (HasINVPCID)
     Builder.defineMacro("__INVPCID__");
     Builder.defineMacro("__INVPCID__");
+  if (HasENQCMD)
+    Builder.defineMacro("__ENQCMD__");
 
 
   // Each case falls through to the previous one here.
   // Each case falls through to the previous one here.
   switch (SSELevel) {
   switch (SSELevel) {
@@ -1334,6 +1338,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
       .Case("clwb", true)
       .Case("clwb", true)
       .Case("clzero", true)
       .Case("clzero", true)
       .Case("cx16", true)
       .Case("cx16", true)
+      .Case("enqcmd", true)
       .Case("f16c", true)
       .Case("f16c", true)
       .Case("fma", true)
       .Case("fma", true)
       .Case("fma4", true)
       .Case("fma4", true)
@@ -1415,6 +1420,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
       .Case("clzero", HasCLZERO)
       .Case("clzero", HasCLZERO)
       .Case("cx8", HasCX8)
       .Case("cx8", HasCX8)
       .Case("cx16", HasCX16)
       .Case("cx16", HasCX16)
+      .Case("enqcmd", HasENQCMD)
       .Case("f16c", HasF16C)
       .Case("f16c", HasF16C)
       .Case("fma", HasFMA)
       .Case("fma", HasFMA)
       .Case("fma4", XOPLevel >= FMA4)
       .Case("fma4", XOPLevel >= FMA4)

+ 1 - 0
lib/Basic/Targets/X86.h

@@ -108,6 +108,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
   bool HasMOVDIR64B = false;
   bool HasMOVDIR64B = false;
   bool HasPTWRITE = false;
   bool HasPTWRITE = false;
   bool HasINVPCID = false;
   bool HasINVPCID = false;
+  bool HasENQCMD = false;
 
 
 protected:
 protected:
   /// Enumeration of all of the X86 CPUs supported by Clang.
   /// Enumeration of all of the X86 CPUs supported by Clang.

+ 1 - 0
lib/Headers/CMakeLists.txt

@@ -50,6 +50,7 @@ set(files
   clflushoptintrin.h
   clflushoptintrin.h
   clwbintrin.h
   clwbintrin.h
   emmintrin.h
   emmintrin.h
+  enqcmdintrin.h
   f16cintrin.h
   f16cintrin.h
   float.h
   float.h
   fma4intrin.h
   fma4intrin.h

+ 1 - 0
lib/Headers/cpuid.h

@@ -177,6 +177,7 @@
 #define bit_CLDEMOTE         0x02000000
 #define bit_CLDEMOTE         0x02000000
 #define bit_MOVDIRI          0x08000000
 #define bit_MOVDIRI          0x08000000
 #define bit_MOVDIR64B        0x10000000
 #define bit_MOVDIR64B        0x10000000
+#define bit_ENQCMD           0x20000000
 
 
 /* Features in %edx for leaf 7 sub-leaf 0 */
 /* Features in %edx for leaf 7 sub-leaf 0 */
 #define bit_AVX5124VNNIW  0x00000004
 #define bit_AVX5124VNNIW  0x00000004

+ 63 - 0
lib/Headers/enqcmdintrin.h

@@ -0,0 +1,63 @@
+/*===------------------ enqcmdintrin.h - enqcmd intrinsics -----------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+
+#ifndef __IMMINTRIN_H
+#error "Never use <enqcmdintrin.h> directly; include <immintrin.h> instead."
+#endif
+
+#ifndef __ENQCMDINTRIN_H
+#define __ENQCMDINTRIN_H
+
+/* Define the default attributes for the functions in this file */
+#define _DEFAULT_FN_ATTRS \
+  __attribute__((__always_inline__, __nodebug__, __target__("enqcmd")))
+
+/// Reads 64-byte command pointed by \a __src, formats 64-byte enqueue store
+///    data, and performs 64-byte enqueue store to memory pointed by \a __dst.
+///    This intrinsics may only be used in User mode.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsics corresponds to the <c> ENQCMD </c> instruction.
+///
+/// \param __dst
+///    Pointer to the destination of the enqueue store.
+/// \param __src
+///    Pointer to 64-byte command data.
+/// \returns If the command data is successfully written to \a __dst then 0 is
+///    returned. Otherwise 1 is returned.
+static __inline__ int _DEFAULT_FN_ATTRS
+_enqcmd (void *__dst, const void *__src)
+{
+  return __builtin_ia32_enqcmd(__dst, __src);
+}
+
+/// Reads 64-byte command pointed by \a __src, formats 64-byte enqueue store
+///    data, and performs 64-byte enqueue store to memory pointed by \a __dst
+///    This intrinsic may only be used in Privileged mode.
+///
+/// \headerfile <x86intrin.h>
+///
+/// This intrinsics corresponds to the <c> ENQCMDS </c> instruction.
+///
+/// \param __dst
+///    Pointer to the destination of the enqueue store.
+/// \param __src
+///    Pointer to 64-byte command data.
+/// \returns If the command data is successfully written to \a __dst then 0 is
+///    returned. Otherwise 1 is returned.
+static __inline__ int _DEFAULT_FN_ATTRS
+_enqcmds (void *__dst, const void *__src)
+{
+  return __builtin_ia32_enqcmds(__dst, __src);
+}
+
+#undef _DEFAULT_FN_ATTRS
+
+#endif /* __ENQCMDINTRIN_H */

+ 4 - 0
lib/Headers/immintrin.h

@@ -431,6 +431,10 @@ _storebe_i64(void * __P, long long __D) {
 #include <avx512vlvp2intersectintrin.h>
 #include <avx512vlvp2intersectintrin.h>
 #endif
 #endif
 
 
+#if !defined(_MSC_VER) || __has_feature(modules) || defined(__ENQCMD__)
+#include <enqcmdintrin.h>
+#endif
+
 #if defined(_MSC_VER) && __has_extension(gnu_asm)
 #if defined(_MSC_VER) && __has_extension(gnu_asm)
 /* Define the default attributes for these intrinsics */
 /* Define the default attributes for these intrinsics */
 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))

+ 20 - 0
test/CodeGen/x86-enqcmd-builtins.c

@@ -0,0 +1,20 @@
+// RUN: %clang_cc1 %s -ffreestanding -triple i386-unknown-unknown -target-feature +enqcmd -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -ffreestanding -triple x86_64-unknown-unknown -target-feature +enqcmd -emit-llvm -o - | FileCheck %s
+
+#include <immintrin.h>
+
+int test_enqcmd(void *dst, const void *src) {
+// CHECK-LABEL: @test_enqcmd
+// CHECK: %[[TMP0:.+]] = call i8 @llvm.x86.enqcmd(i8* %{{.+}}, i8* %{{.+}})
+// CHECK: %[[RET:.+]] = zext i8 %[[TMP0]] to i32
+// CHECK: ret i32 %[[RET]]
+    return _enqcmd(dst, src);
+}
+
+int test_enqcmds(void *dst, const void *src) {
+// CHECK-LABEL: @test_enqcmds
+// CHECK: %[[TMP0:.+]] = call i8 @llvm.x86.enqcmds(i8* %{{.+}}, i8* %{{.+}})
+// CHECK: %[[RET:.+]] = zext i8 %[[TMP0]] to i32
+// CHECK: ret i32 %[[RET]]
+    return _enqcmds(dst, src);
+}

+ 5 - 0
test/Driver/x86-target-features.c

@@ -188,3 +188,8 @@
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-avx512bf16 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-AVX512BF16 %s
 // RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-avx512bf16 %s -### -o %t.o 2>&1 | FileCheck -check-prefix=NO-AVX512BF16 %s
 // AVX512BF16: "-target-feature" "+avx512bf16"
 // AVX512BF16: "-target-feature" "+avx512bf16"
 // NO-AVX512BF16: "-target-feature" "-avx512bf16"
 // NO-AVX512BF16: "-target-feature" "-avx512bf16"
+
+// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -menqcmd %s -### -o %t.o 2>&1 | FileCheck --check-prefix=ENQCMD %s
+// RUN: %clang -target i386-unknown-linux-gnu -march=i386 -mno-enqcmd %s -### -o %t.o 2>&1 | FileCheck --check-prefix=NO-ENQCMD %s
+// ENQCMD: "-target-feature" "+enqcmd"
+// NO-ENQCMD: "-target-feature" "-enqcmd"

+ 7 - 0
test/Preprocessor/x86_target_features.c

@@ -468,3 +468,10 @@
 
 
 // NOVP2INTERSECT-NOT: #define __AVX512VP2INTERSECT__ 1
 // NOVP2INTERSECT-NOT: #define __AVX512VP2INTERSECT__ 1
 
 
+// RUN: %clang -target i386-unknown-unknown -march=atom -menqcmd -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=ENQCMD %s
+
+// ENQCMD: #define __ENQCMD__ 1
+
+// RUN: %clang -target i386-unknown-unknown -march=atom -mno-enqcmd -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=NOENQCMD %s
+
+// NOENQCMD-NOT: #define __ENQCMD__ 1