|
@@ -9188,44 +9188,25 @@ static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
|
|
namespace {
|
|
namespace {
|
|
class RISCVABIInfo : public DefaultABIInfo {
|
|
class RISCVABIInfo : public DefaultABIInfo {
|
|
private:
|
|
private:
|
|
- // Size of the integer ('x') registers in bits.
|
|
|
|
- unsigned XLen;
|
|
|
|
- // Size of the floating point ('f') registers in bits. Note that the target
|
|
|
|
- // ISA might have a wider FLen than the selected ABI (e.g. an RV32IF target
|
|
|
|
- // with soft float ABI has FLen==0).
|
|
|
|
- unsigned FLen;
|
|
|
|
|
|
+ unsigned XLen; // Size of the integer ('x') registers in bits.
|
|
static const int NumArgGPRs = 8;
|
|
static const int NumArgGPRs = 8;
|
|
- static const int NumArgFPRs = 8;
|
|
|
|
- bool detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
|
|
|
|
- llvm::Type *&Field1Ty,
|
|
|
|
- CharUnits &Field1Off,
|
|
|
|
- llvm::Type *&Field2Ty,
|
|
|
|
- CharUnits &Field2Off) const;
|
|
|
|
|
|
|
|
public:
|
|
public:
|
|
- RISCVABIInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen, unsigned FLen)
|
|
|
|
- : DefaultABIInfo(CGT), XLen(XLen), FLen(FLen) {}
|
|
|
|
|
|
+ RISCVABIInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen)
|
|
|
|
+ : DefaultABIInfo(CGT), XLen(XLen) {}
|
|
|
|
|
|
// DefaultABIInfo's classifyReturnType and classifyArgumentType are
|
|
// DefaultABIInfo's classifyReturnType and classifyArgumentType are
|
|
// non-virtual, but computeInfo is virtual, so we overload it.
|
|
// non-virtual, but computeInfo is virtual, so we overload it.
|
|
void computeInfo(CGFunctionInfo &FI) const override;
|
|
void computeInfo(CGFunctionInfo &FI) const override;
|
|
|
|
|
|
- ABIArgInfo classifyArgumentType(QualType Ty, bool IsFixed, int &ArgGPRsLeft,
|
|
|
|
- int &ArgFPRsLeft) const;
|
|
|
|
|
|
+ ABIArgInfo classifyArgumentType(QualType Ty, bool IsFixed,
|
|
|
|
+ int &ArgGPRsLeft) const;
|
|
ABIArgInfo classifyReturnType(QualType RetTy) const;
|
|
ABIArgInfo classifyReturnType(QualType RetTy) const;
|
|
|
|
|
|
Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
|
|
Address EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
|
|
QualType Ty) const override;
|
|
QualType Ty) const override;
|
|
|
|
|
|
ABIArgInfo extendType(QualType Ty) const;
|
|
ABIArgInfo extendType(QualType Ty) const;
|
|
-
|
|
|
|
- bool detectFPCCEligibleStruct(QualType Ty, llvm::Type *&Field1Ty, CharUnits &Field1Off,
|
|
|
|
- llvm::Type *&Field2Ty, CharUnits &Field2Off,
|
|
|
|
- int &NeededArgGPRs, int &NeededArgFPRs) const;
|
|
|
|
- ABIArgInfo coerceAndExpandFPCCEligibleStruct(llvm::Type *Field1Ty,
|
|
|
|
- CharUnits Field1Off,
|
|
|
|
- llvm::Type *Field2Ty,
|
|
|
|
- CharUnits Field2Off) const;
|
|
|
|
};
|
|
};
|
|
} // end anonymous namespace
|
|
} // end anonymous namespace
|
|
|
|
|
|
@@ -9247,214 +9228,18 @@ void RISCVABIInfo::computeInfo(CGFunctionInfo &FI) const {
|
|
// different for variadic arguments, we must also track whether we are
|
|
// different for variadic arguments, we must also track whether we are
|
|
// examining a vararg or not.
|
|
// examining a vararg or not.
|
|
int ArgGPRsLeft = IsRetIndirect ? NumArgGPRs - 1 : NumArgGPRs;
|
|
int ArgGPRsLeft = IsRetIndirect ? NumArgGPRs - 1 : NumArgGPRs;
|
|
- int ArgFPRsLeft = FLen ? NumArgFPRs : 0;
|
|
|
|
int NumFixedArgs = FI.getNumRequiredArgs();
|
|
int NumFixedArgs = FI.getNumRequiredArgs();
|
|
|
|
|
|
int ArgNum = 0;
|
|
int ArgNum = 0;
|
|
for (auto &ArgInfo : FI.arguments()) {
|
|
for (auto &ArgInfo : FI.arguments()) {
|
|
bool IsFixed = ArgNum < NumFixedArgs;
|
|
bool IsFixed = ArgNum < NumFixedArgs;
|
|
- ArgInfo.info =
|
|
|
|
- classifyArgumentType(ArgInfo.type, IsFixed, ArgGPRsLeft, ArgFPRsLeft);
|
|
|
|
|
|
+ ArgInfo.info = classifyArgumentType(ArgInfo.type, IsFixed, ArgGPRsLeft);
|
|
ArgNum++;
|
|
ArgNum++;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
-// Returns true if the struct is a potential candidate for the floating point
|
|
|
|
-// calling convention. If this function returns true, the caller is
|
|
|
|
-// responsible for checking that if there is only a single field then that
|
|
|
|
-// field is a float.
|
|
|
|
-bool RISCVABIInfo::detectFPCCEligibleStructHelper(QualType Ty, CharUnits CurOff,
|
|
|
|
- llvm::Type *&Field1Ty,
|
|
|
|
- CharUnits &Field1Off,
|
|
|
|
- llvm::Type *&Field2Ty,
|
|
|
|
- CharUnits &Field2Off) const {
|
|
|
|
- bool IsInt = Ty->isIntegralOrEnumerationType();
|
|
|
|
- bool IsFloat = Ty->isRealFloatingType();
|
|
|
|
-
|
|
|
|
- if (IsInt || IsFloat) {
|
|
|
|
- uint64_t Size = getContext().getTypeSize(Ty);
|
|
|
|
- if (IsInt && Size > XLen)
|
|
|
|
- return false;
|
|
|
|
- // Can't be eligible if larger than the FP registers. Half precision isn't
|
|
|
|
- // currently supported on RISC-V and the ABI hasn't been confirmed, so
|
|
|
|
- // default to the integer ABI in that case.
|
|
|
|
- if (IsFloat && (Size > FLen || Size < 32))
|
|
|
|
- return false;
|
|
|
|
- // Can't be eligible if an integer type was already found (int+int pairs
|
|
|
|
- // are not eligible).
|
|
|
|
- if (IsInt && Field1Ty && Field1Ty->isIntegerTy())
|
|
|
|
- return false;
|
|
|
|
- if (!Field1Ty) {
|
|
|
|
- Field1Ty = CGT.ConvertType(Ty);
|
|
|
|
- Field1Off = CurOff;
|
|
|
|
- return true;
|
|
|
|
- }
|
|
|
|
- if (!Field2Ty) {
|
|
|
|
- Field2Ty = CGT.ConvertType(Ty);
|
|
|
|
- Field2Off = CurOff;
|
|
|
|
- return true;
|
|
|
|
- }
|
|
|
|
- return false;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (auto CTy = Ty->getAs<ComplexType>()) {
|
|
|
|
- if (Field1Ty)
|
|
|
|
- return false;
|
|
|
|
- QualType EltTy = CTy->getElementType();
|
|
|
|
- if (getContext().getTypeSize(EltTy) > FLen)
|
|
|
|
- return false;
|
|
|
|
- Field1Ty = CGT.ConvertType(EltTy);
|
|
|
|
- Field1Off = CurOff;
|
|
|
|
- assert(CurOff.isZero() && "Unexpected offset for first field");
|
|
|
|
- Field2Ty = Field1Ty;
|
|
|
|
- Field2Off = Field1Off + getContext().getTypeSizeInChars(EltTy);
|
|
|
|
- return true;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (const ConstantArrayType *ATy = getContext().getAsConstantArrayType(Ty)) {
|
|
|
|
- uint64_t ArraySize = ATy->getSize().getZExtValue();
|
|
|
|
- QualType EltTy = ATy->getElementType();
|
|
|
|
- CharUnits EltSize = getContext().getTypeSizeInChars(EltTy);
|
|
|
|
- for (uint64_t i = 0; i < ArraySize; ++i) {
|
|
|
|
- bool Ret = detectFPCCEligibleStructHelper(EltTy, CurOff, Field1Ty, Field1Off,
|
|
|
|
- Field2Ty, Field2Off);
|
|
|
|
- if (!Ret)
|
|
|
|
- return false;
|
|
|
|
- CurOff += EltSize;
|
|
|
|
- }
|
|
|
|
- return true;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (const auto *RTy = Ty->getAs<RecordType>()) {
|
|
|
|
- // Structures with either a non-trivial destructor or a non-trivial
|
|
|
|
- // copy constructor are not eligible for the FP calling convention.
|
|
|
|
- if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT.getCXXABI()))
|
|
|
|
- return false;
|
|
|
|
- if (isEmptyRecord(getContext(), Ty, true))
|
|
|
|
- return true;
|
|
|
|
- const RecordDecl *RD = RTy->getDecl();
|
|
|
|
- // Unions aren't eligible unless they're empty (which is caught above).
|
|
|
|
- if (RD->isUnion())
|
|
|
|
- return false;
|
|
|
|
- int ZeroWidthBitFieldCount = 0;
|
|
|
|
- for (const FieldDecl *FD : RD->fields()) {
|
|
|
|
- const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
|
|
|
|
- uint64_t FieldOffInBits = Layout.getFieldOffset(FD->getFieldIndex());
|
|
|
|
- QualType QTy = FD->getType();
|
|
|
|
- if (FD->isBitField()) {
|
|
|
|
- unsigned BitWidth = FD->getBitWidthValue(getContext());
|
|
|
|
- // Allow a bitfield with a type greater than XLen as long as the
|
|
|
|
- // bitwidth is XLen or less.
|
|
|
|
- if (getContext().getTypeSize(QTy) > XLen && BitWidth <= XLen)
|
|
|
|
- QTy = getContext().getIntTypeForBitwidth(XLen, false);
|
|
|
|
- if (BitWidth == 0) {
|
|
|
|
- ZeroWidthBitFieldCount++;
|
|
|
|
- continue;
|
|
|
|
- }
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- bool Ret = detectFPCCEligibleStructHelper(
|
|
|
|
- QTy, CurOff + getContext().toCharUnitsFromBits(FieldOffInBits),
|
|
|
|
- Field1Ty, Field1Off, Field2Ty, Field2Off);
|
|
|
|
- if (!Ret)
|
|
|
|
- return false;
|
|
|
|
-
|
|
|
|
- // As a quirk of the ABI, zero-width bitfields aren't ignored for fp+fp
|
|
|
|
- // or int+fp structs, but are ignored for a struct with an fp field and
|
|
|
|
- // any number of zero-width bitfields.
|
|
|
|
- if (Field2Ty && ZeroWidthBitFieldCount > 0)
|
|
|
|
- return false;
|
|
|
|
- }
|
|
|
|
- return Field1Ty != nullptr;
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- return false;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-// Determine if a struct is eligible for passing according to the floating
|
|
|
|
-// point calling convention (i.e., when flattened it contains a single fp
|
|
|
|
-// value, fp+fp, or int+fp of appropriate size). If so, NeededArgFPRs and
|
|
|
|
-// NeededArgGPRs are incremented appropriately.
|
|
|
|
-bool RISCVABIInfo::detectFPCCEligibleStruct(QualType Ty, llvm::Type *&Field1Ty,
|
|
|
|
- CharUnits &Field1Off,
|
|
|
|
- llvm::Type *&Field2Ty,
|
|
|
|
- CharUnits &Field2Off,
|
|
|
|
- int &NeededArgGPRs,
|
|
|
|
- int &NeededArgFPRs) const {
|
|
|
|
- Field1Ty = nullptr;
|
|
|
|
- Field2Ty = nullptr;
|
|
|
|
- NeededArgGPRs = 0;
|
|
|
|
- NeededArgFPRs = 0;
|
|
|
|
- bool IsCandidate = detectFPCCEligibleStructHelper(
|
|
|
|
- Ty, CharUnits::Zero(), Field1Ty, Field1Off, Field2Ty, Field2Off);
|
|
|
|
- // Not really a candidate if we have a single int but no float.
|
|
|
|
- if (Field1Ty && !Field2Ty && !Field1Ty->isFloatingPointTy())
|
|
|
|
- return IsCandidate = false;
|
|
|
|
- if (!IsCandidate)
|
|
|
|
- return false;
|
|
|
|
- if (Field1Ty && Field1Ty->isFloatingPointTy())
|
|
|
|
- NeededArgFPRs++;
|
|
|
|
- else if (Field1Ty)
|
|
|
|
- NeededArgGPRs++;
|
|
|
|
- if (Field2Ty && Field2Ty->isFloatingPointTy())
|
|
|
|
- NeededArgFPRs++;
|
|
|
|
- else if (Field2Ty)
|
|
|
|
- NeededArgGPRs++;
|
|
|
|
- return IsCandidate;
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
-// Call getCoerceAndExpand for the two-element flattened struct described by
|
|
|
|
-// Field1Ty, Field1Off, Field2Ty, Field2Off. This method will create an appropriate
|
|
|
|
-// coerceToType and unpaddedCoerceToType.
|
|
|
|
-ABIArgInfo RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
|
|
|
|
- llvm::Type *Field1Ty, CharUnits Field1Off, llvm::Type *Field2Ty, CharUnits Field2Off) const {
|
|
|
|
- SmallVector<llvm::Type *, 3> CoerceElts;
|
|
|
|
- SmallVector<llvm::Type *, 2> UnpaddedCoerceElts;
|
|
|
|
- if (!Field1Off.isZero())
|
|
|
|
- CoerceElts.push_back(llvm::ArrayType::get(
|
|
|
|
- llvm::Type::getInt8Ty(getVMContext()), Field1Off.getQuantity()));
|
|
|
|
-
|
|
|
|
- CoerceElts.push_back(Field1Ty);
|
|
|
|
- UnpaddedCoerceElts.push_back(Field1Ty);
|
|
|
|
-
|
|
|
|
- if (!Field2Ty) {
|
|
|
|
- return ABIArgInfo::getCoerceAndExpand(
|
|
|
|
- llvm::StructType::get(getVMContext(), CoerceElts, !Field1Off.isZero()),
|
|
|
|
- UnpaddedCoerceElts[0]);
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- CharUnits Field2Align =
|
|
|
|
- CharUnits::fromQuantity(getDataLayout().getABITypeAlignment(Field2Ty));
|
|
|
|
- CharUnits Field1Size =
|
|
|
|
- CharUnits::fromQuantity(getDataLayout().getTypeStoreSize(Field1Ty));
|
|
|
|
- CharUnits Field2OffNoPadNoPack = Field1Size.alignTo(Field2Align);
|
|
|
|
-
|
|
|
|
- CharUnits Padding = CharUnits::Zero();
|
|
|
|
- if (Field2Off > Field2OffNoPadNoPack)
|
|
|
|
- Padding = Field2Off - Field2OffNoPadNoPack;
|
|
|
|
- else if (Field2Off != Field2Align && Field2Off > Field1Size)
|
|
|
|
- Padding = Field2Off - Field1Size;
|
|
|
|
-
|
|
|
|
- bool IsPacked = !Field2Off.isMultipleOf(Field2Align);
|
|
|
|
-
|
|
|
|
- if (!Padding.isZero())
|
|
|
|
- CoerceElts.push_back(llvm::ArrayType::get(
|
|
|
|
- llvm::Type::getInt8Ty(getVMContext()), Padding.getQuantity()));
|
|
|
|
-
|
|
|
|
- CoerceElts.push_back(Field2Ty);
|
|
|
|
- UnpaddedCoerceElts.push_back(Field2Ty);
|
|
|
|
-
|
|
|
|
- auto CoerceToType =
|
|
|
|
- llvm::StructType::get(getVMContext(), CoerceElts, IsPacked);
|
|
|
|
- auto UnpaddedCoerceToType =
|
|
|
|
- llvm::StructType::get(getVMContext(), UnpaddedCoerceElts, IsPacked);
|
|
|
|
-
|
|
|
|
- return ABIArgInfo::getCoerceAndExpand(CoerceToType, UnpaddedCoerceToType);
|
|
|
|
-}
|
|
|
|
-
|
|
|
|
ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
|
|
ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
|
|
- int &ArgGPRsLeft,
|
|
|
|
- int &ArgFPRsLeft) const {
|
|
|
|
|
|
+ int &ArgGPRsLeft) const {
|
|
assert(ArgGPRsLeft <= NumArgGPRs && "Arg GPR tracking underflow");
|
|
assert(ArgGPRsLeft <= NumArgGPRs && "Arg GPR tracking underflow");
|
|
Ty = useFirstFieldIfTransparentUnion(Ty);
|
|
Ty = useFirstFieldIfTransparentUnion(Ty);
|
|
|
|
|
|
@@ -9472,40 +9257,6 @@ ABIArgInfo RISCVABIInfo::classifyArgumentType(QualType Ty, bool IsFixed,
|
|
return ABIArgInfo::getIgnore();
|
|
return ABIArgInfo::getIgnore();
|
|
|
|
|
|
uint64_t Size = getContext().getTypeSize(Ty);
|
|
uint64_t Size = getContext().getTypeSize(Ty);
|
|
-
|
|
|
|
- // Pass floating point values via FPRs if possible.
|
|
|
|
- if (IsFixed && Ty->isFloatingType() && FLen >= Size && ArgFPRsLeft) {
|
|
|
|
- ArgFPRsLeft--;
|
|
|
|
- return ABIArgInfo::getDirect();
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- // Complex types for the hard float ABI must be passed direct rather than
|
|
|
|
- // using CoerceAndExpand.
|
|
|
|
- if (IsFixed && Ty->isComplexType() && FLen && ArgFPRsLeft >= 2) {
|
|
|
|
- QualType EltTy = Ty->getAs<ComplexType>()->getElementType();
|
|
|
|
- if (getContext().getTypeSize(EltTy) <= FLen) {
|
|
|
|
- ArgFPRsLeft -= 2;
|
|
|
|
- return ABIArgInfo::getDirect();
|
|
|
|
- }
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
- if (IsFixed && FLen && Ty->isStructureOrClassType()) {
|
|
|
|
- llvm::Type *Field1Ty = nullptr;
|
|
|
|
- llvm::Type *Field2Ty = nullptr;
|
|
|
|
- CharUnits Field1Off = CharUnits::Zero();
|
|
|
|
- CharUnits Field2Off = CharUnits::Zero();
|
|
|
|
- int NeededArgGPRs;
|
|
|
|
- int NeededArgFPRs;
|
|
|
|
- bool IsCandidate = detectFPCCEligibleStruct(
|
|
|
|
- Ty, Field1Ty, Field1Off, Field2Ty, Field2Off, NeededArgGPRs, NeededArgFPRs);
|
|
|
|
- if (IsCandidate && NeededArgGPRs <= ArgGPRsLeft &&
|
|
|
|
- NeededArgFPRs <= ArgFPRsLeft) {
|
|
|
|
- ArgGPRsLeft -= NeededArgGPRs;
|
|
|
|
- ArgFPRsLeft -= NeededArgFPRs;
|
|
|
|
- return coerceAndExpandFPCCEligibleStruct(Field1Ty, Field1Off, Field2Ty, Field2Off);
|
|
|
|
- }
|
|
|
|
- }
|
|
|
|
-
|
|
|
|
uint64_t NeededAlign = getContext().getTypeAlign(Ty);
|
|
uint64_t NeededAlign = getContext().getTypeAlign(Ty);
|
|
bool MustUseStack = false;
|
|
bool MustUseStack = false;
|
|
// Determine the number of GPRs needed to pass the current argument
|
|
// Determine the number of GPRs needed to pass the current argument
|
|
@@ -9564,12 +9315,10 @@ ABIArgInfo RISCVABIInfo::classifyReturnType(QualType RetTy) const {
|
|
return ABIArgInfo::getIgnore();
|
|
return ABIArgInfo::getIgnore();
|
|
|
|
|
|
int ArgGPRsLeft = 2;
|
|
int ArgGPRsLeft = 2;
|
|
- int ArgFPRsLeft = FLen ? 2 : 0;
|
|
|
|
|
|
|
|
// The rules for return and argument types are the same, so defer to
|
|
// The rules for return and argument types are the same, so defer to
|
|
// classifyArgumentType.
|
|
// classifyArgumentType.
|
|
- return classifyArgumentType(RetTy, /*IsFixed=*/true, ArgGPRsLeft,
|
|
|
|
- ArgFPRsLeft);
|
|
|
|
|
|
+ return classifyArgumentType(RetTy, /*IsFixed=*/true, ArgGPRsLeft);
|
|
}
|
|
}
|
|
|
|
|
|
Address RISCVABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
|
|
Address RISCVABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAListAddr,
|
|
@@ -9604,9 +9353,8 @@ ABIArgInfo RISCVABIInfo::extendType(QualType Ty) const {
|
|
namespace {
|
|
namespace {
|
|
class RISCVTargetCodeGenInfo : public TargetCodeGenInfo {
|
|
class RISCVTargetCodeGenInfo : public TargetCodeGenInfo {
|
|
public:
|
|
public:
|
|
- RISCVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen,
|
|
|
|
- unsigned FLen)
|
|
|
|
- : TargetCodeGenInfo(new RISCVABIInfo(CGT, XLen, FLen)) {}
|
|
|
|
|
|
+ RISCVTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned XLen)
|
|
|
|
+ : TargetCodeGenInfo(new RISCVABIInfo(CGT, XLen)) {}
|
|
|
|
|
|
void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
|
|
void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
|
|
CodeGen::CodeGenModule &CGM) const override {
|
|
CodeGen::CodeGenModule &CGM) const override {
|
|
@@ -9745,16 +9493,9 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
|
|
return SetCGInfo(new MSP430TargetCodeGenInfo(Types));
|
|
return SetCGInfo(new MSP430TargetCodeGenInfo(Types));
|
|
|
|
|
|
case llvm::Triple::riscv32:
|
|
case llvm::Triple::riscv32:
|
|
- case llvm::Triple::riscv64: {
|
|
|
|
- StringRef ABIStr = getTarget().getABI();
|
|
|
|
- unsigned XLen = getTarget().getPointerWidth(0);
|
|
|
|
- unsigned ABIFLen = 0;
|
|
|
|
- if (ABIStr.endswith("f"))
|
|
|
|
- ABIFLen = 32;
|
|
|
|
- else if (ABIStr.endswith("d"))
|
|
|
|
- ABIFLen = 64;
|
|
|
|
- return SetCGInfo(new RISCVTargetCodeGenInfo(Types, XLen, ABIFLen));
|
|
|
|
- }
|
|
|
|
|
|
+ return SetCGInfo(new RISCVTargetCodeGenInfo(Types, 32));
|
|
|
|
+ case llvm::Triple::riscv64:
|
|
|
|
+ return SetCGInfo(new RISCVTargetCodeGenInfo(Types, 64));
|
|
|
|
|
|
case llvm::Triple::systemz: {
|
|
case llvm::Triple::systemz: {
|
|
bool HasVector = getTarget().getABI() == "vector";
|
|
bool HasVector = getTarget().getABI() == "vector";
|