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ARM: enable struct byval for AAPCS.

rdar://9877866
PR://13350


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@161694 91177308-0d34-0410-b5e6-96231b3b80d8
Manman Ren 13 anos atrás
pai
commit
16ba7c8498
2 arquivos alterados com 7 adições e 3 exclusões
  1. 1 3
      lib/CodeGen/TargetInfo.cpp
  2. 6 0
      test/CodeGen/arm-arguments.c

+ 1 - 3
lib/CodeGen/TargetInfo.cpp

@@ -2757,9 +2757,7 @@ ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const {
     }
     }
   }
   }
 
 
-  // FIXME: byval for AAPCS is not yet supported; we need it for performance
-  // and to support large alignment.
-  if (getABIKind() == ARMABIInfo::APCS) {
+  if (getABIKind() == ARMABIInfo::APCS || getABIKind() == ARMABIInfo::AAPCS) {
     if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64) ||
     if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64) ||
         getContext().getTypeAlign(Ty) > 64) {
         getContext().getTypeAlign(Ty) > 64) {
       return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
       return ABIArgInfo::getIndirect(0, /*ByVal=*/true);

+ 6 - 0
test/CodeGen/arm-arguments.c

@@ -172,3 +172,9 @@ struct s32 { double x; };
 void f32(struct s32 s) { }
 void f32(struct s32 s) { }
 // AAPCS: @f32([1 x i64] %s.coerce)
 // AAPCS: @f32([1 x i64] %s.coerce)
 // APCS-GNU: @f32([2 x i32] %s.coerce)
 // APCS-GNU: @f32([2 x i32] %s.coerce)
+
+// PR13350
+struct s33 { char buf[32*32]; };
+void f33(struct s33 s) { }
+// APCS-GNU: define void @f33(%struct.s33* byval %s)
+// AAPCS: define arm_aapcscc void @f33(%struct.s33* byval %s)